INTEL_ICL_IDS(&gen11_early_ops),
INTEL_EHL_IDS(&gen11_early_ops),
INTEL_JSL_IDS(&gen11_early_ops),
- INTEL_TGL_12_IDS(&gen11_early_ops),
+ INTEL_TGL_IDS(&gen11_early_ops),
INTEL_RKL_IDS(&gen11_early_ops),
INTEL_ADLS_IDS(&gen11_early_ops),
INTEL_ADLP_IDS(&gen11_early_ops),
INTEL_ICL_IDS(&icl_display),
INTEL_EHL_IDS(&jsl_ehl_display),
INTEL_JSL_IDS(&jsl_ehl_display),
- INTEL_TGL_12_IDS(&tgl_display),
+ INTEL_TGL_IDS(&tgl_display),
INTEL_DG1_IDS(&dg1_display),
INTEL_RKL_IDS(&rkl_display),
INTEL_ADLS_IDS(&adl_s_display),
INTEL_ICL_IDS(&icl_info),
INTEL_EHL_IDS(&ehl_info),
INTEL_JSL_IDS(&jsl_info),
- INTEL_TGL_12_IDS(&tgl_info),
+ INTEL_TGL_IDS(&tgl_info),
INTEL_RKL_IDS(&rkl_info),
INTEL_ADLS_IDS(&adl_s_info),
INTEL_ADLP_IDS(&adl_p_info),
};
static const u16 subplatform_uy_ids[] = {
- INTEL_TGL_12_GT2_IDS(0),
+ INTEL_TGL_GT2_IDS(0),
};
static const u16 subplatform_n_ids[] = {
INTEL_VGA_DEVICE(0x4E71, info)
/* TGL */
-#define INTEL_TGL_12_GT1_IDS(info) \
+#define INTEL_TGL_GT1_IDS(info) \
INTEL_VGA_DEVICE(0x9A60, info), \
INTEL_VGA_DEVICE(0x9A68, info), \
INTEL_VGA_DEVICE(0x9A70, info)
-#define INTEL_TGL_12_GT2_IDS(info) \
+#define INTEL_TGL_GT2_IDS(info) \
INTEL_VGA_DEVICE(0x9A40, info), \
INTEL_VGA_DEVICE(0x9A49, info), \
INTEL_VGA_DEVICE(0x9A59, info), \
INTEL_VGA_DEVICE(0x9AD9, info), \
INTEL_VGA_DEVICE(0x9AF8, info)
-#define INTEL_TGL_12_IDS(info) \
- INTEL_TGL_12_GT1_IDS(info), \
- INTEL_TGL_12_GT2_IDS(info)
+#define INTEL_TGL_IDS(info) \
+ INTEL_TGL_GT1_IDS(info), \
+ INTEL_TGL_GT2_IDS(info)
/* RKL */
#define INTEL_RKL_IDS(info) \