#include "sun8i_vi_layer.h"
 #include "sunxi_engine.h"
 
+struct de2_fmt_info {
+       u32     drm_fmt;
+       u32     de2_fmt;
+};
+
 static const struct de2_fmt_info de2_formats[] = {
        {
                .drm_fmt = DRM_FORMAT_ARGB8888,
        },
 };
 
-const struct de2_fmt_info *sun8i_mixer_format_info(u32 format)
+int sun8i_mixer_drm_format_to_hw(u32 format, u32 *hw_format)
 {
        unsigned int i;
 
        for (i = 0; i < ARRAY_SIZE(de2_formats); ++i)
-               if (de2_formats[i].drm_fmt == format)
-                       return &de2_formats[i];
+               if (de2_formats[i].drm_fmt == format) {
+                       *hw_format = de2_formats[i].de2_fmt;
+                       return 0;
+               }
 
-       return NULL;
+       return -EINVAL;
 }
 
 static void sun8i_mixer_commit(struct sunxi_engine *engine)
 
 #define SUN50I_MIXER_CDC0_EN                   0xd0000
 #define SUN50I_MIXER_CDC1_EN                   0xd8000
 
-struct de2_fmt_info {
-       u32     drm_fmt;
-       u32     de2_fmt;
-};
-
 /**
  * struct sun8i_mixer_cfg - mixer HW configuration
  * @vi_num: number of VI channels
                return DE2_CH_BASE + channel * DE2_CH_SIZE;
 }
 
-const struct de2_fmt_info *sun8i_mixer_format_info(u32 format);
+int sun8i_mixer_drm_format_to_hw(u32 format, u32 *hw_format);
 #endif /* _SUN8I_MIXER_H_ */
 
                                         int overlay, struct drm_plane *plane)
 {
        struct drm_plane_state *state = plane->state;
-       const struct de2_fmt_info *fmt_info;
        const struct drm_format_info *fmt;
-       u32 val, ch_base;
+       u32 val, ch_base, hw_fmt;
+       int ret;
 
        ch_base = sun8i_channel_base(mixer, channel);
 
        fmt = state->fb->format;
-       fmt_info = sun8i_mixer_format_info(fmt->format);
-       if (!fmt_info || fmt->is_yuv) {
+       ret = sun8i_mixer_drm_format_to_hw(fmt->format, &hw_fmt);
+       if (ret || fmt->is_yuv) {
                DRM_DEBUG_DRIVER("Invalid format\n");
                return -EINVAL;
        }
 
-       val = fmt_info->de2_fmt << SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_OFFSET;
+       val = hw_fmt << SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_OFFSET;
        regmap_update_bits(mixer->engine.regs,
                           SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay),
                           SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_MASK, val);
 
                                         int overlay, struct drm_plane *plane)
 {
        struct drm_plane_state *state = plane->state;
-       const struct de2_fmt_info *fmt_info;
+       u32 val, ch_base, csc_mode, hw_fmt;
        const struct drm_format_info *fmt;
-       u32 val, ch_base, csc_mode;
+       int ret;
 
        ch_base = sun8i_channel_base(mixer, channel);
 
        fmt = state->fb->format;
-       fmt_info = sun8i_mixer_format_info(fmt->format);
-       if (!fmt_info) {
+       ret = sun8i_mixer_drm_format_to_hw(fmt->format, &hw_fmt);
+       if (ret) {
                DRM_DEBUG_DRIVER("Invalid format\n");
-               return -EINVAL;
+               return ret;
        }
 
-       val = fmt_info->de2_fmt << SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_OFFSET;
+       val = hw_fmt << SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_OFFSET;
        regmap_update_bits(mixer->engine.regs,
                           SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay),
                           SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_MASK, val);