drm/msm: Document and rename preempt_lock

Before adding another lock, give ring->lock a more descriptive name.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Signed-off-by: Rob Clark <robdclark@chromium.org>

diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index ad84f9eaa03ce2560176417fcfd79489ed6fd363..b0005ccd81c61487a33f8461f4f43e710527d04e 100644 (file)
--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
@@ -36,7 +36,7 @@ void a5xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring,
                OUT_RING(ring, upper_32_bits(shadowptr(a5xx_gpu, ring)));
        }
 
-       spin_lock_irqsave(&ring->lock, flags);
+       spin_lock_irqsave(&ring->preempt_lock, flags);
 
        /* Copy the shadow to the actual register */
        ring->cur = ring->next;
@@ -44,7 +44,7 @@ void a5xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring,
        /* Make sure to wrap wptr if we need to */
        wptr = get_wptr(ring);
 
-       spin_unlock_irqrestore(&ring->lock, flags);
+       spin_unlock_irqrestore(&ring->preempt_lock, flags);
 
        /* Make sure everything is posted before making a decision */
        mb();

diff --git a/drivers/gpu/drm/msm/adreno/a5xx_preempt.c b/drivers/gpu/drm/msm/adreno/a5xx_preempt.c
index eaf3f4e197a7e1dda5daea047024cc708c48c91a..42eaef7ad7c7ce3fd2411c0d73e51a8bc1b4d8f9 100644 (file)
--- a/drivers/gpu/drm/msm/adreno/a5xx_preempt.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_preempt.c
@@ -45,9 +45,9 @@ static inline void update_wptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring)
        if (!ring)
                return;
 
-       spin_lock_irqsave(&ring->lock, flags);
+       spin_lock_irqsave(&ring->preempt_lock, flags);
        wptr = get_wptr(ring);
-       spin_unlock_irqrestore(&ring->lock, flags);
+       spin_unlock_irqrestore(&ring->preempt_lock, flags);
 
        gpu_write(gpu, REG_A5XX_CP_RB_WPTR, wptr);
 }
@@ -62,9 +62,9 @@ static struct msm_ringbuffer *get_next_ring(struct msm_gpu *gpu)
                bool empty;
                struct msm_ringbuffer *ring = gpu->rb[i];
 
-               spin_lock_irqsave(&ring->lock, flags);
+               spin_lock_irqsave(&ring->preempt_lock, flags);
                empty = (get_wptr(ring) == ring->memptrs->rptr);
-               spin_unlock_irqrestore(&ring->lock, flags);
+               spin_unlock_irqrestore(&ring->preempt_lock, flags);
 
                if (!empty)
                        return ring;
@@ -131,9 +131,9 @@ void a5xx_preempt_trigger(struct msm_gpu *gpu)
        }
 
        /* Make sure the wptr doesn't update while we're in motion */
-       spin_lock_irqsave(&ring->lock, flags);
+       spin_lock_irqsave(&ring->preempt_lock, flags);
        a5xx_gpu->preempt[ring->id]->wptr = get_wptr(ring);
-       spin_unlock_irqrestore(&ring->lock, flags);
+       spin_unlock_irqrestore(&ring->preempt_lock, flags);
 
        /* Set the address of the incoming preemption record */
        gpu_write64(gpu, REG_A5XX_CP_CONTEXT_SWITCH_RESTORE_ADDR_LO,

diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index ab932ab8290ac5efc82fa0ac06432ef7315711dc..2f236aadfa9ceb5550871c60402004c18cb349cd 100644 (file)
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -65,7 +65,7 @@ static void a6xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring)
                OUT_RING(ring, upper_32_bits(shadowptr(a6xx_gpu, ring)));
        }
 
-       spin_lock_irqsave(&ring->lock, flags);
+       spin_lock_irqsave(&ring->preempt_lock, flags);
 
        /* Copy the shadow to the actual register */
        ring->cur = ring->next;
@@ -73,7 +73,7 @@ static void a6xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring)
        /* Make sure to wrap wptr if we need to */
        wptr = get_wptr(ring);
 
-       spin_unlock_irqrestore(&ring->lock, flags);
+       spin_unlock_irqrestore(&ring->preempt_lock, flags);
 
        /* Make sure everything is posted before making a decision */
        mb();

diff --git a/drivers/gpu/drm/msm/msm_ringbuffer.c b/drivers/gpu/drm/msm/msm_ringbuffer.c
index 935bf9b1d94188cba556a0e5dfca389ba008f126..1b6958e908dca7fcfa4023d3a2353c90169ffe3c 100644 (file)
--- a/drivers/gpu/drm/msm/msm_ringbuffer.c
+++ b/drivers/gpu/drm/msm/msm_ringbuffer.c
@@ -46,7 +46,7 @@ struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id,
        ring->memptrs_iova = memptrs_iova;
 
        INIT_LIST_HEAD(&ring->submits);
-       spin_lock_init(&ring->lock);
+       spin_lock_init(&ring->preempt_lock);
 
        snprintf(name, sizeof(name), "gpu-ring-%d", ring->id);
 

diff --git a/drivers/gpu/drm/msm/msm_ringbuffer.h b/drivers/gpu/drm/msm/msm_ringbuffer.h
index 0987d6bf848cfc90660f753eb926f30f326d71a1..4956d1bc5d0e12c18d53dbe67c3098c1bab63035 100644 (file)
--- a/drivers/gpu/drm/msm/msm_ringbuffer.h
+++ b/drivers/gpu/drm/msm/msm_ringbuffer.h
@@ -46,7 +46,12 @@ struct msm_ringbuffer {
        struct msm_rbmemptrs *memptrs;
        uint64_t memptrs_iova;
        struct msm_fence_context *fctx;
-       spinlock_t lock;
+
+       /*
+        * preempt_lock protects preemption and serializes wptr updates against
+        * preemption.  Can be aquired from irq context.
+        */
+       spinlock_t preempt_lock;
 };
 
 struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id,