arm64: dts: ti: k3-am62a7-sk: Enable IPC with remote processors

For each remote proc, reserve memory for IPC and bind the mailbox
assignments. Two memory regions are reserved for each remote processor.
The first region of 1MB of memory is used for Vring shared buffers
and the second region is used as external memory to the remote processor
for the resource table and for tracebuffer allocations.

Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Beleswar Padhi <b-padhi@ti.com>
Reviewed-by: Jai Luthra <jai.luthra@ideasonboard.com>
Acked-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20250502220325.3230653-7-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
index c65ada5a22abbd88a70e81703c28b7b83461c6c8..59a872413bab1f580610d8c7cc0a0eb2187d7db1 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
@@ -52,6 +52,42 @@
                        linux,cma-default;
                };
 
+               c7x_0_dma_memory_region: c7x-dma-memory@99800000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x00 0x99800000 0x00 0x100000>;
+                       no-map;
+               };
+
+               c7x_0_memory_region: c7x-memory@99900000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x00 0x99900000 0x00 0xf00000>;
+                       no-map;
+               };
+
+               mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@9b800000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x00 0x9b800000 0x00 0x100000>;
+                       no-map;
+               };
+
+               mcu_r5fss0_core0_memory_region: r5f-dma-memory@9b900000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x00 0x9b900000 0x00 0xf00000>;
+                       no-map;
+               };
+
+               wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x00 0x9c800000 0x00 0x100000>;
+                       no-map;
+               };
+
+               wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x00 0x9c900000 0x00 0xf00000>;
+                       no-map;
+               };
+
                secure_tfa_ddr: tfa@9e780000 {
                        reg = <0x00 0x9e780000 0x00 0x80000>;
                        alignment = <0x1000>;
@@ -63,12 +99,6 @@
                        alignment = <0x1000>;
                        no-map;
                };
-
-               wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0x9c900000 0x00 0x01e00000>;
-                       no-map;
-               };
        };
 
        opp-table {
@@ -782,3 +812,57 @@
        pinctrl-0 = <&main_epwm1_pins_default>;
        status = "okay";
 };
+
+&mailbox0_cluster0 {
+       status = "okay";
+
+       mbox_r5_0: mbox-r5-0 {
+               ti,mbox-rx = <0 0 0>;
+               ti,mbox-tx = <1 0 0>;
+       };
+};
+
+&mailbox0_cluster1 {
+       status = "okay";
+
+       mbox_c7x_0: mbox-c7x-0 {
+               ti,mbox-rx = <0 0 0>;
+               ti,mbox-tx = <1 0 0>;
+       };
+};
+
+&mailbox0_cluster2 {
+       status = "okay";
+
+       mbox_mcu_r5_0: mbox-mcu-r5-0 {
+               ti,mbox-rx = <0 0 0>;
+               ti,mbox-tx = <1 0 0>;
+       };
+};
+
+&wkup_r5fss0 {
+       status = "okay";
+};
+
+&wkup_r5fss0_core0 {
+       mboxes = <&mailbox0_cluster0>, <&mbox_r5_0>;
+       memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
+                       <&wkup_r5fss0_core0_memory_region>;
+};
+
+&mcu_r5fss0 {
+       status = "okay";
+};
+
+&mcu_r5fss0_core0 {
+       mboxes = <&mailbox0_cluster2>, <&mbox_mcu_r5_0>;
+       memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
+                       <&mcu_r5fss0_core0_memory_region>;
+};
+
+&c7x_0 {
+       mboxes = <&mailbox0_cluster1>, <&mbox_c7x_0>;
+       memory-region = <&c7x_0_dma_memory_region>,
+                       <&c7x_0_memory_region>;
+       status = "okay";
+};