x86/speculation: Rework speculative_store_bypass_update()

The upcoming support for the virtual SPEC_CTRL MSR on AMD needs to reuse
speculative_store_bypass_update() to avoid code duplication. Add an
argument for supplying a thread info (TIF) value and create a wrapper
speculative_store_bypass_update_current() which is used at the existing
call site.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Reviewed-by: Darren Kenny <darren.kenny@oracle.com>
Orabug: 28063992
CVE: CVE-2018-3639

(cherry picked from commit 0270be3e)
Signed-off-by: Mihai Carabas <mihai.carabas@oracle.com>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Brian Maly <brian.maly@oracle.com>
Conflicts:
	arch/x86/kernel/cpu/bugs.c
[Different filename (bugs_64.c)]

Signed-off-by: Brian Maly <brian.maly@oracle.com>

diff --git a/arch/x86/include/asm/spec-ctrl.h b/arch/x86/include/asm/spec-ctrl.h
index 43a2abaee318efb5d2971dc600d77414e7beee24..3e28fbff68fdc357273f08c1cb891e0423cb1ced 100644 (file)
--- a/arch/x86/include/asm/spec-ctrl.h
+++ b/arch/x86/include/asm/spec-ctrl.h
@@ -42,6 +42,11 @@ extern void speculative_store_bypass_ht_init(void);
 static inline void speculative_store_bypass_ht_init(void) { }
 #endif
 
-extern void speculative_store_bypass_update(void);
+extern void speculative_store_bypass_update(unsigned long tif);
+
+static inline void speculative_store_bypass_update_current(void)
+{
+       speculative_store_bypass_update(current_thread_info()->flags);
+}
 
 #endif

diff --git a/arch/x86/kernel/cpu/bugs_64.c b/arch/x86/kernel/cpu/bugs_64.c
index 3843b3585394520567b91ceef7d2eeb1197bde69..0738883ca11190e7873483f2c69bcb5b2b3e4eb1 100644 (file)
--- a/arch/x86/kernel/cpu/bugs_64.c
+++ b/arch/x86/kernel/cpu/bugs_64.c
@@ -868,7 +868,7 @@ static int ssb_prctl_set(struct task_struct *task, unsigned long ctrl)
         * mitigation until it is next scheduled.
         */
        if (task == current && update)
-               speculative_store_bypass_update();
+               speculative_store_bypass_update_current();
 
        return 0;
 }

diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 7920be85b3df5926bfe497f0e2fdf1d74c93ff9a..aca03f119511ad7bdad20e12fbc61a0763e7ea87 100644 (file)
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -365,10 +365,10 @@ static __always_inline void __speculative_store_bypass_update(unsigned long tifn
                intel_set_ssb_state(tifn);
 }
 
-void speculative_store_bypass_update(void)
+void speculative_store_bypass_update(unsigned long tif)
 {
        preempt_disable();
-       __speculative_store_bypass_update(current_thread_info()->flags);
+       __speculative_store_bypass_update(tif);
        preempt_enable();
 }