#include "intel_drv.h"
 #include "i915_drv.h"
 
-static void i8xx_fbc_disable(struct drm_device *dev)
+static void i8xx_fbc_disable(struct drm_i915_private *dev_priv)
 {
-       struct drm_i915_private *dev_priv = dev->dev_private;
        u32 fbc_ctl;
 
        dev_priv->fbc.enabled = false;
 
 static void i8xx_fbc_enable(struct drm_crtc *crtc)
 {
-       struct drm_device *dev = crtc->dev;
-       struct drm_i915_private *dev_priv = dev->dev_private;
+       struct drm_i915_private *dev_priv = crtc->dev->dev_private;
        struct drm_framebuffer *fb = crtc->primary->fb;
        struct drm_i915_gem_object *obj = intel_fb_obj(fb);
        struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
                cfb_pitch = fb->pitches[0];
 
        /* FBC_CTL wants 32B or 64B units */
-       if (IS_GEN2(dev))
+       if (IS_GEN2(dev_priv))
                cfb_pitch = (cfb_pitch / 32) - 1;
        else
                cfb_pitch = (cfb_pitch / 64) - 1;
        for (i = 0; i < (FBC_LL_SIZE / 32) + 1; i++)
                I915_WRITE(FBC_TAG + (i * 4), 0);
 
-       if (IS_GEN4(dev)) {
+       if (IS_GEN4(dev_priv)) {
                u32 fbc_ctl2;
 
                /* Set it up... */
        fbc_ctl = I915_READ(FBC_CONTROL);
        fbc_ctl &= 0x3fff << FBC_CTL_INTERVAL_SHIFT;
        fbc_ctl |= FBC_CTL_EN | FBC_CTL_PERIODIC;
-       if (IS_I945GM(dev))
+       if (IS_I945GM(dev_priv))
                fbc_ctl |= FBC_CTL_C3_IDLE; /* 945 needs special SR handling */
        fbc_ctl |= (cfb_pitch & 0xff) << FBC_CTL_STRIDE_SHIFT;
        fbc_ctl |= obj->fence_reg;
                      cfb_pitch, crtc->y, plane_name(intel_crtc->plane));
 }
 
-static bool i8xx_fbc_enabled(struct drm_device *dev)
+static bool i8xx_fbc_enabled(struct drm_i915_private *dev_priv)
 {
-       struct drm_i915_private *dev_priv = dev->dev_private;
-
        return I915_READ(FBC_CONTROL) & FBC_CTL_EN;
 }
 
 static void g4x_fbc_enable(struct drm_crtc *crtc)
 {
-       struct drm_device *dev = crtc->dev;
-       struct drm_i915_private *dev_priv = dev->dev_private;
+       struct drm_i915_private *dev_priv = crtc->dev->dev_private;
        struct drm_framebuffer *fb = crtc->primary->fb;
        struct drm_i915_gem_object *obj = intel_fb_obj(fb);
        struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
        DRM_DEBUG_KMS("enabled fbc on plane %c\n", plane_name(intel_crtc->plane));
 }
 
-static void g4x_fbc_disable(struct drm_device *dev)
+static void g4x_fbc_disable(struct drm_i915_private *dev_priv)
 {
-       struct drm_i915_private *dev_priv = dev->dev_private;
        u32 dpfc_ctl;
 
        dev_priv->fbc.enabled = false;
        }
 }
 
-static bool g4x_fbc_enabled(struct drm_device *dev)
+static bool g4x_fbc_enabled(struct drm_i915_private *dev_priv)
 {
-       struct drm_i915_private *dev_priv = dev->dev_private;
-
        return I915_READ(DPFC_CONTROL) & DPFC_CTL_EN;
 }
 
 
 static void ilk_fbc_enable(struct drm_crtc *crtc)
 {
-       struct drm_device *dev = crtc->dev;
-       struct drm_i915_private *dev_priv = dev->dev_private;
+       struct drm_i915_private *dev_priv = crtc->dev->dev_private;
        struct drm_framebuffer *fb = crtc->primary->fb;
        struct drm_i915_gem_object *obj = intel_fb_obj(fb);
        struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
                break;
        }
        dpfc_ctl |= DPFC_CTL_FENCE_EN;
-       if (IS_GEN5(dev))
+       if (IS_GEN5(dev_priv))
                dpfc_ctl |= obj->fence_reg;
 
        I915_WRITE(ILK_DPFC_FENCE_YOFF, crtc->y);
        /* enable it... */
        I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN);
 
-       if (IS_GEN6(dev)) {
+       if (IS_GEN6(dev_priv)) {
                I915_WRITE(SNB_DPFC_CTL_SA,
                           SNB_CPU_FENCE_ENABLE | obj->fence_reg);
                I915_WRITE(DPFC_CPU_FENCE_OFFSET, crtc->y);
        DRM_DEBUG_KMS("enabled fbc on plane %c\n", plane_name(intel_crtc->plane));
 }
 
-static void ilk_fbc_disable(struct drm_device *dev)
+static void ilk_fbc_disable(struct drm_i915_private *dev_priv)
 {
-       struct drm_i915_private *dev_priv = dev->dev_private;
        u32 dpfc_ctl;
 
        dev_priv->fbc.enabled = false;
        }
 }
 
-static bool ilk_fbc_enabled(struct drm_device *dev)
+static bool ilk_fbc_enabled(struct drm_i915_private *dev_priv)
 {
-       struct drm_i915_private *dev_priv = dev->dev_private;
-
        return I915_READ(ILK_DPFC_CONTROL) & DPFC_CTL_EN;
 }
 
 static void gen7_fbc_enable(struct drm_crtc *crtc)
 {
-       struct drm_device *dev = crtc->dev;
-       struct drm_i915_private *dev_priv = dev->dev_private;
+       struct drm_i915_private *dev_priv = crtc->dev->dev_private;
        struct drm_framebuffer *fb = crtc->primary->fb;
        struct drm_i915_gem_object *obj = intel_fb_obj(fb);
        struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
        dev_priv->fbc.enabled = true;
 
        dpfc_ctl = 0;
-       if (IS_IVYBRIDGE(dev))
+       if (IS_IVYBRIDGE(dev_priv))
                dpfc_ctl |= IVB_DPFC_CTL_PLANE(intel_crtc->plane);
 
        if (drm_format_plane_cpp(fb->pixel_format, 0) == 2)
 
        I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN);
 
-       if (IS_IVYBRIDGE(dev)) {
+       if (IS_IVYBRIDGE(dev_priv)) {
                /* WaFbcAsynchFlipDisableFbcQueue:ivb */
                I915_WRITE(ILK_DISPLAY_CHICKEN1,
                           I915_READ(ILK_DISPLAY_CHICKEN1) |
 
 /**
  * intel_fbc_enabled - Is FBC enabled?
- * @dev: the drm_device
+ * @dev_priv: i915 device instance
  *
  * This function is used to verify the current state of FBC.
  * FIXME: This should be tracked in the plane config eventually
  *        instead of queried at runtime for most callers.
  */
-bool intel_fbc_enabled(struct drm_device *dev)
+bool intel_fbc_enabled(struct drm_i915_private *dev_priv)
 {
-       struct drm_i915_private *dev_priv = dev->dev_private;
-
        return dev_priv->fbc.enabled;
 }
 
        struct intel_fbc_work *work =
                container_of(to_delayed_work(__work),
                             struct intel_fbc_work, work);
-       struct drm_device *dev = work->crtc->dev;
-       struct drm_i915_private *dev_priv = dev->dev_private;
+       struct drm_i915_private *dev_priv = work->crtc->dev->dev_private;
 
        mutex_lock(&dev_priv->fbc.lock);
        if (work == dev_priv->fbc.fbc_work) {
 static void intel_fbc_enable(struct drm_crtc *crtc)
 {
        struct intel_fbc_work *work;
-       struct drm_device *dev = crtc->dev;
-       struct drm_i915_private *dev_priv = dev->dev_private;
+       struct drm_i915_private *dev_priv = crtc->dev->dev_private;
 
        WARN_ON(!mutex_is_locked(&dev_priv->fbc.lock));
 
        schedule_delayed_work(&work->work, msecs_to_jiffies(50));
 }
 
-static void __intel_fbc_disable(struct drm_device *dev)
+static void __intel_fbc_disable(struct drm_i915_private *dev_priv)
 {
-       struct drm_i915_private *dev_priv = dev->dev_private;
-
        WARN_ON(!mutex_is_locked(&dev_priv->fbc.lock));
 
        intel_fbc_cancel_work(dev_priv);
 
-       dev_priv->fbc.disable_fbc(dev);
+       dev_priv->fbc.disable_fbc(dev_priv);
        dev_priv->fbc.crtc = NULL;
 }
 
 /**
  * intel_fbc_disable - disable FBC
- * @dev: the drm_device
+ * @dev_priv: i915 device instance
  *
  * This function disables FBC.
  */
-void intel_fbc_disable(struct drm_device *dev)
+void intel_fbc_disable(struct drm_i915_private *dev_priv)
 {
-       struct drm_i915_private *dev_priv = dev->dev_private;
-
        if (!dev_priv->fbc.enable_fbc)
                return;
 
        mutex_lock(&dev_priv->fbc.lock);
-       __intel_fbc_disable(dev);
+       __intel_fbc_disable(dev_priv);
        mutex_unlock(&dev_priv->fbc.lock);
 }
 
  */
 void intel_fbc_disable_crtc(struct intel_crtc *crtc)
 {
-       struct drm_device *dev = crtc->base.dev;
-       struct drm_i915_private *dev_priv = dev->dev_private;
+       struct drm_i915_private *dev_priv = crtc->base.dev->dev_private;
 
        if (!dev_priv->fbc.enable_fbc)
                return;
 
        mutex_lock(&dev_priv->fbc.lock);
        if (dev_priv->fbc.crtc == crtc)
-               __intel_fbc_disable(dev);
+               __intel_fbc_disable(dev_priv);
        mutex_unlock(&dev_priv->fbc.lock);
 }
 
        return crtc;
 }
 
-static int find_compression_threshold(struct drm_device *dev,
+static int find_compression_threshold(struct drm_i915_private *dev_priv,
                                      struct drm_mm_node *node,
                                      int size,
                                      int fb_cpp)
 {
-       struct drm_i915_private *dev_priv = dev->dev_private;
        int compression_threshold = 1;
        int ret;
 
                return 0;
 
        ret = i915_gem_stolen_insert_node(dev_priv, node, size >>= 1, 4096);
-       if (ret && INTEL_INFO(dev)->gen <= 4) {
+       if (ret && INTEL_INFO(dev_priv)->gen <= 4) {
                return 0;
        } else if (ret) {
                compression_threshold <<= 1;
        }
 }
 
-static int intel_fbc_alloc_cfb(struct drm_device *dev, int size, int fb_cpp)
+static int intel_fbc_alloc_cfb(struct drm_i915_private *dev_priv, int size,
+                              int fb_cpp)
 {
-       struct drm_i915_private *dev_priv = dev->dev_private;
        struct drm_mm_node *uninitialized_var(compressed_llb);
        int ret;
 
-       ret = find_compression_threshold(dev, &dev_priv->fbc.compressed_fb,
+       ret = find_compression_threshold(dev_priv, &dev_priv->fbc.compressed_fb,
                                         size, fb_cpp);
        if (!ret)
                goto err_llb;
 
        if (INTEL_INFO(dev_priv)->gen >= 5)
                I915_WRITE(ILK_DPFC_CB_BASE, dev_priv->fbc.compressed_fb.start);
-       else if (IS_GM45(dev)) {
+       else if (IS_GM45(dev_priv)) {
                I915_WRITE(DPFC_CB_BASE, dev_priv->fbc.compressed_fb.start);
        } else {
                compressed_llb = kzalloc(sizeof(*compressed_llb), GFP_KERNEL);
        return -ENOSPC;
 }
 
-static void __intel_fbc_cleanup_cfb(struct drm_device *dev)
+static void __intel_fbc_cleanup_cfb(struct drm_i915_private *dev_priv)
 {
-       struct drm_i915_private *dev_priv = dev->dev_private;
-
        if (dev_priv->fbc.uncompressed_size == 0)
                return;
 
        dev_priv->fbc.uncompressed_size = 0;
 }
 
-void intel_fbc_cleanup_cfb(struct drm_device *dev)
+void intel_fbc_cleanup_cfb(struct drm_i915_private *dev_priv)
 {
-       struct drm_i915_private *dev_priv = dev->dev_private;
-
        if (!dev_priv->fbc.enable_fbc)
                return;
 
        mutex_lock(&dev_priv->fbc.lock);
-       __intel_fbc_cleanup_cfb(dev);
+       __intel_fbc_cleanup_cfb(dev_priv);
        mutex_unlock(&dev_priv->fbc.lock);
 }
 
-static int intel_fbc_setup_cfb(struct drm_device *dev, int size, int fb_cpp)
+static int intel_fbc_setup_cfb(struct drm_i915_private *dev_priv, int size,
+                              int fb_cpp)
 {
-       struct drm_i915_private *dev_priv = dev->dev_private;
-
        if (size <= dev_priv->fbc.uncompressed_size)
                return 0;
 
        /* Release any current block */
-       __intel_fbc_cleanup_cfb(dev);
+       __intel_fbc_cleanup_cfb(dev_priv);
 
-       return intel_fbc_alloc_cfb(dev, size, fb_cpp);
+       return intel_fbc_alloc_cfb(dev_priv, size, fb_cpp);
 }
 
 /**
  * __intel_fbc_update - enable/disable FBC as needed, unlocked
- * @dev: the drm_device
+ * @dev_priv: i915 device instance
  *
  * Set up the framebuffer compression hardware at mode set time.  We
  * enable it if possible:
  *
  * We need to enable/disable FBC on a global basis.
  */
-static void __intel_fbc_update(struct drm_device *dev)
+static void __intel_fbc_update(struct drm_i915_private *dev_priv)
 {
-       struct drm_i915_private *dev_priv = dev->dev_private;
        struct drm_crtc *crtc = NULL;
        struct intel_crtc *intel_crtc;
        struct drm_framebuffer *fb;
        WARN_ON(!mutex_is_locked(&dev_priv->fbc.lock));
 
        /* disable framebuffer compression in vGPU */
-       if (intel_vgpu_active(dev))
+       if (intel_vgpu_active(dev_priv->dev))
                i915.enable_fbc = 0;
 
        if (i915.enable_fbc < 0) {
                goto out_disable;
        }
 
-       if (INTEL_INFO(dev)->gen >= 8 || IS_HASWELL(dev)) {
+       if (INTEL_INFO(dev_priv)->gen >= 8 || IS_HASWELL(dev_priv)) {
                max_width = 4096;
                max_height = 4096;
-       } else if (IS_G4X(dev) || INTEL_INFO(dev)->gen >= 5) {
+       } else if (IS_G4X(dev_priv) || INTEL_INFO(dev_priv)->gen >= 5) {
                max_width = 4096;
                max_height = 2048;
        } else {
                set_no_fbc_reason(dev_priv, FBC_MODE_TOO_LARGE);
                goto out_disable;
        }
-       if ((INTEL_INFO(dev)->gen < 4 || HAS_DDI(dev)) &&
+       if ((INTEL_INFO(dev_priv)->gen < 4 || HAS_DDI(dev_priv)) &&
            intel_crtc->plane != PLANE_A) {
                set_no_fbc_reason(dev_priv, FBC_BAD_PLANE);
                goto out_disable;
                set_no_fbc_reason(dev_priv, FBC_NOT_TILED);
                goto out_disable;
        }
-       if (INTEL_INFO(dev)->gen <= 4 && !IS_G4X(dev) &&
+       if (INTEL_INFO(dev_priv)->gen <= 4 && !IS_G4X(dev_priv) &&
            crtc->primary->state->rotation != BIT(DRM_ROTATE_0)) {
                set_no_fbc_reason(dev_priv, FBC_ROTATION);
                goto out_disable;
        if (in_dbg_master())
                goto out_disable;
 
-       if (intel_fbc_setup_cfb(dev, obj->base.size,
+       if (intel_fbc_setup_cfb(dev_priv, obj->base.size,
                                drm_format_plane_cpp(fb->pixel_format, 0))) {
                set_no_fbc_reason(dev_priv, FBC_STOLEN_TOO_SMALL);
                goto out_disable;
            dev_priv->fbc.y == crtc->y)
                return;
 
-       if (intel_fbc_enabled(dev)) {
+       if (intel_fbc_enabled(dev_priv)) {
                /* We update FBC along two paths, after changing fb/crtc
                 * configuration (modeswitching) and after page-flipping
                 * finishes. For the latter, we know that not only did
                 * some point. And we wait before enabling FBC anyway.
                 */
                DRM_DEBUG_KMS("disabling active FBC for update\n");
-               __intel_fbc_disable(dev);
+               __intel_fbc_disable(dev_priv);
        }
 
        intel_fbc_enable(crtc);
 
 out_disable:
        /* Multiple disables should be harmless */
-       if (intel_fbc_enabled(dev)) {
+       if (intel_fbc_enabled(dev_priv)) {
                DRM_DEBUG_KMS("unsupported config, disabling FBC\n");
-               __intel_fbc_disable(dev);
+               __intel_fbc_disable(dev_priv);
        }
-       __intel_fbc_cleanup_cfb(dev);
+       __intel_fbc_cleanup_cfb(dev_priv);
 }
 
 /*
  * intel_fbc_update - enable/disable FBC as needed
- * @dev: the drm_device
+ * @dev_priv: i915 device instance
  *
  * This function reevaluates the overall state and enables or disables FBC.
  */
-void intel_fbc_update(struct drm_device *dev)
+void intel_fbc_update(struct drm_i915_private *dev_priv)
 {
-       struct drm_i915_private *dev_priv = dev->dev_private;
-
        if (!dev_priv->fbc.enable_fbc)
                return;
 
        mutex_lock(&dev_priv->fbc.lock);
-       __intel_fbc_update(dev);
+       __intel_fbc_update(dev_priv);
        mutex_unlock(&dev_priv->fbc.lock);
 }
 
                          unsigned int frontbuffer_bits,
                          enum fb_op_origin origin)
 {
-       struct drm_device *dev = dev_priv->dev;
        unsigned int fbc_bits;
 
        if (!dev_priv->fbc.enable_fbc)
        dev_priv->fbc.busy_bits |= (fbc_bits & frontbuffer_bits);
 
        if (dev_priv->fbc.busy_bits)
-               __intel_fbc_disable(dev);
+               __intel_fbc_disable(dev_priv);
 
        mutex_unlock(&dev_priv->fbc.lock);
 }
 void intel_fbc_flush(struct drm_i915_private *dev_priv,
                     unsigned int frontbuffer_bits)
 {
-       struct drm_device *dev = dev_priv->dev;
-
        if (!dev_priv->fbc.enable_fbc)
                return;
 
        dev_priv->fbc.busy_bits &= ~frontbuffer_bits;
 
        if (!dev_priv->fbc.busy_bits)
-               __intel_fbc_update(dev);
+               __intel_fbc_update(dev_priv);
 
 out:
        mutex_unlock(&dev_priv->fbc.lock);
                I915_WRITE(FBC_CONTROL, 500 << FBC_CTL_INTERVAL_SHIFT);
        }
 
-       dev_priv->fbc.enabled = dev_priv->fbc.fbc_enabled(dev_priv->dev);
+       dev_priv->fbc.enabled = dev_priv->fbc.fbc_enabled(dev_priv);
 }