net: dsa: mt7530: rename mt753x_bpdu_port_fw enum to mt753x_to_cpu_fw

The mt753x_bpdu_port_fw enum is globally used for manipulating the process
of deciding the forwardable ports, specifically concerning the CPU port(s).
Therefore, rename it and the values in it to mt753x_to_cpu_fw.

Change FOLLOW_MFC to SYSTEM_DEFAULT to be on par with the switch documents.

Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
index 5b6aeeddb5d9f478c4e09d3a93f6fef6c6d30ce7..7f864f895ba0be64068c230fbd40eed0473e7929 100644 (file)
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -1107,42 +1107,34 @@ mt753x_trap_frames(struct mt7530_priv *priv)
         * VLAN-untagged.
         */
        mt7530_rmw(priv, MT753X_BPC,
-                  MT753X_PAE_BPDU_FR | MT753X_PAE_EG_TAG_MASK |
-                          MT753X_PAE_PORT_FW_MASK | MT753X_BPDU_EG_TAG_MASK |
-                          MT753X_BPDU_PORT_FW_MASK,
-                  MT753X_PAE_BPDU_FR |
-                          MT753X_PAE_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
-                          MT753X_PAE_PORT_FW(MT753X_BPDU_CPU_ONLY) |
-                          MT753X_BPDU_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
-                          MT753X_BPDU_CPU_ONLY);
+                  PAE_BPDU_FR | PAE_EG_TAG_MASK | PAE_PORT_FW_MASK |
+                          BPDU_EG_TAG_MASK | BPDU_PORT_FW_MASK,
+                  PAE_BPDU_FR | PAE_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
+                          PAE_PORT_FW(TO_CPU_FW_CPU_ONLY) |
+                          BPDU_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
+                          TO_CPU_FW_CPU_ONLY);
 
        /* Trap frames with :01 and :02 MAC DAs to the CPU port(s) and egress
         * them VLAN-untagged.
         */
        mt7530_rmw(priv, MT753X_RGAC1,
-                  MT753X_R02_BPDU_FR | MT753X_R02_EG_TAG_MASK |
-                          MT753X_R02_PORT_FW_MASK | MT753X_R01_BPDU_FR |
-                          MT753X_R01_EG_TAG_MASK | MT753X_R01_PORT_FW_MASK,
-                  MT753X_R02_BPDU_FR |
-                          MT753X_R02_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
-                          MT753X_R02_PORT_FW(MT753X_BPDU_CPU_ONLY) |
-                          MT753X_R01_BPDU_FR |
-                          MT753X_R01_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
-                          MT753X_BPDU_CPU_ONLY);
+                  R02_BPDU_FR | R02_EG_TAG_MASK | R02_PORT_FW_MASK |
+                          R01_BPDU_FR | R01_EG_TAG_MASK | R01_PORT_FW_MASK,
+                  R02_BPDU_FR | R02_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
+                          R02_PORT_FW(TO_CPU_FW_CPU_ONLY) | R01_BPDU_FR |
+                          R01_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
+                          TO_CPU_FW_CPU_ONLY);
 
        /* Trap frames with :03 and :0E MAC DAs to the CPU port(s) and egress
         * them VLAN-untagged.
         */
        mt7530_rmw(priv, MT753X_RGAC2,
-                  MT753X_R0E_BPDU_FR | MT753X_R0E_EG_TAG_MASK |
-                          MT753X_R0E_PORT_FW_MASK | MT753X_R03_BPDU_FR |
-                          MT753X_R03_EG_TAG_MASK | MT753X_R03_PORT_FW_MASK,
-                  MT753X_R0E_BPDU_FR |
-                          MT753X_R0E_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
-                          MT753X_R0E_PORT_FW(MT753X_BPDU_CPU_ONLY) |
-                          MT753X_R03_BPDU_FR |
-                          MT753X_R03_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
-                          MT753X_BPDU_CPU_ONLY);
+                  R0E_BPDU_FR | R0E_EG_TAG_MASK | R0E_PORT_FW_MASK |
+                          R03_BPDU_FR | R03_EG_TAG_MASK | R03_PORT_FW_MASK,
+                  R0E_BPDU_FR | R0E_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
+                          R0E_PORT_FW(TO_CPU_FW_CPU_ONLY) | R03_BPDU_FR |
+                          R03_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
+                          TO_CPU_FW_CPU_ONLY);
 }
 
 static void

diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h
index c8155e32edbe52e7a4b0b55b2b9a5aa4347b0e87..0d5167f5ba6bcdc3d6a2bb1b076a4f8a394e06e9 100644 (file)
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
@@ -67,47 +67,47 @@ enum mt753x_id {
 #define MT753X_MIRROR_MASK(id)         ((((id) == ID_MT7531) || ((id) == ID_MT7988)) ? \
                                         MT7531_MIRROR_MASK : MIRROR_MASK)
 
-/* Registers for BPDU and PAE frame control*/
+/* Register for BPDU and PAE frame control */
 #define MT753X_BPC                     0x24
-#define  MT753X_PAE_BPDU_FR            BIT(25)
-#define  MT753X_PAE_EG_TAG_MASK                GENMASK(24, 22)
-#define  MT753X_PAE_EG_TAG(x)          FIELD_PREP(MT753X_PAE_EG_TAG_MASK, x)
-#define  MT753X_PAE_PORT_FW_MASK       GENMASK(18, 16)
-#define  MT753X_PAE_PORT_FW(x)         FIELD_PREP(MT753X_PAE_PORT_FW_MASK, x)
-#define  MT753X_BPDU_EG_TAG_MASK       GENMASK(8, 6)
-#define  MT753X_BPDU_EG_TAG(x)         FIELD_PREP(MT753X_BPDU_EG_TAG_MASK, x)
-#define  MT753X_BPDU_PORT_FW_MASK      GENMASK(2, 0)
-
-/* Register for :01 and :02 MAC DA frame control */
+#define  PAE_BPDU_FR                   BIT(25)
+#define  PAE_EG_TAG_MASK               GENMASK(24, 22)
+#define  PAE_EG_TAG(x)                 FIELD_PREP(PAE_EG_TAG_MASK, x)
+#define  PAE_PORT_FW_MASK              GENMASK(18, 16)
+#define  PAE_PORT_FW(x)                        FIELD_PREP(PAE_PORT_FW_MASK, x)
+#define  BPDU_EG_TAG_MASK              GENMASK(8, 6)
+#define  BPDU_EG_TAG(x)                        FIELD_PREP(BPDU_EG_TAG_MASK, x)
+#define  BPDU_PORT_FW_MASK             GENMASK(2, 0)
+
+/* Register for 01-80-C2-00-00-[01,02] MAC DA frame control */
 #define MT753X_RGAC1                   0x28
-#define  MT753X_R02_BPDU_FR            BIT(25)
-#define  MT753X_R02_EG_TAG_MASK                GENMASK(24, 22)
-#define  MT753X_R02_EG_TAG(x)          FIELD_PREP(MT753X_R02_EG_TAG_MASK, x)
-#define  MT753X_R02_PORT_FW_MASK       GENMASK(18, 16)
-#define  MT753X_R02_PORT_FW(x)         FIELD_PREP(MT753X_R02_PORT_FW_MASK, x)
-#define  MT753X_R01_BPDU_FR            BIT(9)
-#define  MT753X_R01_EG_TAG_MASK                GENMASK(8, 6)
-#define  MT753X_R01_EG_TAG(x)          FIELD_PREP(MT753X_R01_EG_TAG_MASK, x)
-#define  MT753X_R01_PORT_FW_MASK       GENMASK(2, 0)
-
-/* Register for :03 and :0E MAC DA frame control */
+#define  R02_BPDU_FR                   BIT(25)
+#define  R02_EG_TAG_MASK               GENMASK(24, 22)
+#define  R02_EG_TAG(x)                 FIELD_PREP(R02_EG_TAG_MASK, x)
+#define  R02_PORT_FW_MASK              GENMASK(18, 16)
+#define  R02_PORT_FW(x)                        FIELD_PREP(R02_PORT_FW_MASK, x)
+#define  R01_BPDU_FR                   BIT(9)
+#define  R01_EG_TAG_MASK               GENMASK(8, 6)
+#define  R01_EG_TAG(x)                 FIELD_PREP(R01_EG_TAG_MASK, x)
+#define  R01_PORT_FW_MASK              GENMASK(2, 0)
+
+/* Register for 01-80-C2-00-00-[03,0E] MAC DA frame control */
 #define MT753X_RGAC2                   0x2c
-#define  MT753X_R0E_BPDU_FR            BIT(25)
-#define  MT753X_R0E_EG_TAG_MASK                GENMASK(24, 22)
-#define  MT753X_R0E_EG_TAG(x)          FIELD_PREP(MT753X_R0E_EG_TAG_MASK, x)
-#define  MT753X_R0E_PORT_FW_MASK       GENMASK(18, 16)
-#define  MT753X_R0E_PORT_FW(x)         FIELD_PREP(MT753X_R0E_PORT_FW_MASK, x)
-#define  MT753X_R03_BPDU_FR            BIT(9)
-#define  MT753X_R03_EG_TAG_MASK                GENMASK(8, 6)
-#define  MT753X_R03_EG_TAG(x)          FIELD_PREP(MT753X_R03_EG_TAG_MASK, x)
-#define  MT753X_R03_PORT_FW_MASK       GENMASK(2, 0)
-
-enum mt753x_bpdu_port_fw {
-       MT753X_BPDU_FOLLOW_MFC,
-       MT753X_BPDU_CPU_EXCLUDE = 4,
-       MT753X_BPDU_CPU_INCLUDE = 5,
-       MT753X_BPDU_CPU_ONLY = 6,
-       MT753X_BPDU_DROP = 7,
+#define  R0E_BPDU_FR                   BIT(25)
+#define  R0E_EG_TAG_MASK               GENMASK(24, 22)
+#define  R0E_EG_TAG(x)                 FIELD_PREP(R0E_EG_TAG_MASK, x)
+#define  R0E_PORT_FW_MASK              GENMASK(18, 16)
+#define  R0E_PORT_FW(x)                        FIELD_PREP(R0E_PORT_FW_MASK, x)
+#define  R03_BPDU_FR                   BIT(9)
+#define  R03_EG_TAG_MASK               GENMASK(8, 6)
+#define  R03_EG_TAG(x)                 FIELD_PREP(R03_EG_TAG_MASK, x)
+#define  R03_PORT_FW_MASK              GENMASK(2, 0)
+
+enum mt753x_to_cpu_fw {
+       TO_CPU_FW_SYSTEM_DEFAULT,
+       TO_CPU_FW_CPU_EXCLUDE = 4,
+       TO_CPU_FW_CPU_INCLUDE = 5,
+       TO_CPU_FW_CPU_ONLY = 6,
+       TO_CPU_FW_DROP = 7,
 };
 
 /* Registers for address table access */