drm/i915/gvt: Don't read ADPA_CRT_HOTPLUG_MONITOR from host

When host connects a crt screen, linux guest will detect two
screens: crt and dp. This is wrong as linux guest has only
one dp.

In order to avoid guest get host crt screen, we should set
ADPA_CRT_HOTPLUG_MONITOR to none. But MMIO_RO(PCH_ADPA) prevent
from that. So MMIO_DH should be used instead of MMIO_RO.

v2: Clear its staus to none at initialize, so guest don't
    get host crt.(Zhangyu)
v3: SKL doesn't have this register, limit it to pre_skl.(xiong)

Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

diff --git a/drivers/gpu/drm/i915/gvt/display.c b/drivers/gpu/drm/i915/gvt/display.c
index 818e94907c3b3b070a4b72d58b35e53b99eb5d82..2deb05f618fb11054064122a4b86f468d148c73b 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/display.c
+++ b/drivers/gpu/drm/i915/gvt/display.c
@@ -262,6 +262,10 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu)
 
                vgpu_vreg(vgpu, DDI_BUF_CTL(PORT_A)) |= DDI_INIT_DISPLAY_DETECTED;
        }
+
+       /* Clear host CRT status, so guest couldn't detect this host CRT. */
+       if (IS_BROADWELL(dev_priv))
+               vgpu_vreg(vgpu, PCH_ADPA) &= ~ADPA_CRT_HOTPLUG_MONITOR_MASK;
 }
 
 static void clean_virtual_dp_monitor(struct intel_vgpu *vgpu, int port_num)

diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
index 0ffd696545927277200d8b2332a024168672c5c5..437a35f41b62a0cd513859474b9385f5acdba461 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -1905,7 +1905,7 @@ static int init_generic_mmio_info(struct intel_gvt *gvt)
        MMIO_F(_PCH_DPD_AUX_CH_CTL, 6 * 4, 0, 0, 0, D_PRE_SKL, NULL,
                dp_aux_ch_ctl_mmio_write);
 
-       MMIO_RO(PCH_ADPA, D_ALL, 0, ADPA_CRT_HOTPLUG_MONITOR_MASK, NULL, pch_adpa_mmio_write);
+       MMIO_DH(PCH_ADPA, D_PRE_SKL, NULL, pch_adpa_mmio_write);
 
        MMIO_DH(_PCH_TRANSACONF, D_ALL, NULL, transconf_mmio_write);
        MMIO_DH(_PCH_TRANSBCONF, D_ALL, NULL, transconf_mmio_write);