Revert "drm/amd/display: Fix for otg synchronization logic"

This reverts commit a896f870f8a5f23ec961d16baffd3fda1f8be57c.

It causes odd flickering on my Radeon RX580 (PCI ID 1002:67df rev e7,
subsystem ID 1da2:e353).

Bisected right to this commit, and reverting it fixes things.

Link: https://lore.kernel.org/all/CAHk-=wg9hDde_L3bK9tAfdJ4N=TJJ+SjO3ZDONqH5=bVoy_Mzg@mail.gmail.com/
Cc: Alex Deucher <alexdeucher@gmail.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Dave Airlie <airlied@gmail.com>
Cc: Christian Koenig <christian.koenig@amd.com>
Cc: Jun Lei <Jun.Lei@amd.com>
Cc: Mustapha Ghaddar <mustapha.ghaddar@amd.com>
Cc: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Cc: meenakshikumar somasundaram <meenakshikumar.somasundaram@amd.com>
Cc: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 91c4874473d620b9d865ea7e939dc5b0847bc882..01c8849b9db2becbc70158973b0a00b9841ff97d 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -1404,29 +1404,22 @@ static void program_timing_sync(
                                status->timing_sync_info.master = false;
 
                }
+               /* remove any other unblanked pipes as they have already been synced */
+               for (j = j + 1; j < group_size; j++) {
+                       bool is_blanked;
 
-               /* remove any other pipes that are already been synced */
-               if (dc->config.use_pipe_ctx_sync_logic) {
-                       /* check pipe's syncd to decide which pipe to be removed */
-                       for (j = 1; j < group_size; j++) {
-                               if (pipe_set[j]->pipe_idx_syncd == pipe_set[0]->pipe_idx_syncd) {
-                                       group_size--;
-                                       pipe_set[j] = pipe_set[group_size];
-                                       j--;
-                               } else
-                                       /* link slave pipe's syncd with master pipe */
-                                       pipe_set[j]->pipe_idx_syncd = pipe_set[0]->pipe_idx_syncd;
+                       if (pipe_set[j]->stream_res.opp->funcs->dpg_is_blanked)
+                               is_blanked =
+                                       pipe_set[j]->stream_res.opp->funcs->dpg_is_blanked(pipe_set[j]->stream_res.opp);
+                       else
+                               is_blanked =
+                                       pipe_set[j]->stream_res.tg->funcs->is_blanked(pipe_set[j]->stream_res.tg);
+                       if (!is_blanked) {
+                               group_size--;
+                               pipe_set[j] = pipe_set[group_size];
+                               j--;
                        }
-               } else {
-                       /* remove any other pipes by checking valid plane */
-                       for (j = j + 1; j < group_size; j++) {
-                               if (pipe_set[j]->plane_state) {
-                                       group_size--;
-                                       pipe_set[j] = pipe_set[group_size];
-                                       j--;
-                               }
-                       }
-               }
+               }
 
                if (group_size > 1) {
                        if (sync_type == TIMING_SYNCHRONIZABLE) {

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index eaeef72773f6947f6fd4f490406163c475a4c037..de5c7d1e02676121bf6137519ee7af3f9245069e 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
@@ -3216,57 +3216,3 @@ struct hpo_dp_link_encoder *resource_get_hpo_dp_link_enc_for_det_lt(
        return hpo_dp_link_enc;
 }
 #endif
-
-void reset_syncd_pipes_from_disabled_pipes(struct dc *dc,
-               struct dc_state *context)
-{
-       int i, j;
-       struct pipe_ctx *pipe_ctx_old, *pipe_ctx, *pipe_ctx_syncd;
-
-       /* If pipe backend is reset, need to reset pipe syncd status */
-       for (i = 0; i < dc->res_pool->pipe_count; i++) {
-               pipe_ctx_old =  &dc->current_state->res_ctx.pipe_ctx[i];
-               pipe_ctx = &context->res_ctx.pipe_ctx[i];
-
-               if (!pipe_ctx_old->stream)
-                       continue;
-
-               if (pipe_ctx_old->top_pipe || pipe_ctx_old->prev_odm_pipe)
-                       continue;
-
-               if (!pipe_ctx->stream ||
-                               pipe_need_reprogram(pipe_ctx_old, pipe_ctx)) {
-
-                       /* Reset all the syncd pipes from the disabled pipe */
-                       for (j = 0; j < dc->res_pool->pipe_count; j++) {
-                               pipe_ctx_syncd = &context->res_ctx.pipe_ctx[j];
-                               if ((GET_PIPE_SYNCD_FROM_PIPE(pipe_ctx_syncd) == pipe_ctx_old->pipe_idx) ||
-                                       !IS_PIPE_SYNCD_VALID(pipe_ctx_syncd))
-                                       SET_PIPE_SYNCD_TO_PIPE(pipe_ctx_syncd, j);
-                       }
-               }
-       }
-}
-
-void check_syncd_pipes_for_disabled_master_pipe(struct dc *dc,
-       struct dc_state *context,
-       uint8_t disabled_master_pipe_idx)
-{
-       int i;
-       struct pipe_ctx *pipe_ctx, *pipe_ctx_check;
-
-       pipe_ctx = &context->res_ctx.pipe_ctx[disabled_master_pipe_idx];
-       if ((GET_PIPE_SYNCD_FROM_PIPE(pipe_ctx) != disabled_master_pipe_idx) ||
-               !IS_PIPE_SYNCD_VALID(pipe_ctx))
-               SET_PIPE_SYNCD_TO_PIPE(pipe_ctx, disabled_master_pipe_idx);
-
-       /* for the pipe disabled, check if any slave pipe exists and assert */
-       for (i = 0; i < dc->res_pool->pipe_count; i++) {
-               pipe_ctx_check = &context->res_ctx.pipe_ctx[i];
-
-               if ((GET_PIPE_SYNCD_FROM_PIPE(pipe_ctx_check) == disabled_master_pipe_idx) &&
-                       IS_PIPE_SYNCD_VALID(pipe_ctx_check) && (i != disabled_master_pipe_idx))
-                       DC_ERR("DC: Failure: pipe_idx[%d] syncd with disabled master pipe_idx[%d]\n",
-                               i, disabled_master_pipe_idx);
-       }
-}

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 288e7b01f56174cbcb33932a3f5a8d6d5928a448..da2c78ce14d6ce06d5613d54d86fdb4c68c19309 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -344,7 +344,6 @@ struct dc_config {
        uint8_t  vblank_alignment_max_frame_time_diff;
        bool is_asymmetric_memory;
        bool is_single_rank_dimm;
-       bool use_pipe_ctx_sync_logic;
 };
 
 enum visual_confirm {

diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index f1593186e964d9f58982f7ab8f45c2938c9e57a0..78192ecba102a87a932c58599c44df3548c9e20c 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -1566,10 +1566,6 @@ static enum dc_status apply_single_controller_ctx_to_hw(
                                &pipe_ctx->stream->audio_info);
        }
 
-       /* make sure no pipes syncd to the pipe being enabled */
-       if (!pipe_ctx->stream->apply_seamless_boot_optimization && dc->config.use_pipe_ctx_sync_logic)
-               check_syncd_pipes_for_disabled_master_pipe(dc, context, pipe_ctx->pipe_idx);
-
 #if defined(CONFIG_DRM_AMD_DC_DCN)
        /* DCN3.1 FPGA Workaround
         * Need to enable HPO DP Stream Encoder before setting OTG master enable.
@@ -2301,10 +2297,6 @@ enum dc_status dce110_apply_ctx_to_hw(
        enum dc_status status;
        int i;
 
-       /* reset syncd pipes from disabled pipes */
-       if (dc->config.use_pipe_ctx_sync_logic)
-               reset_syncd_pipes_from_disabled_pipes(dc, context);
-
        /* Reset old context */
        /* look up the targets that have been removed since last commit */
        hws->funcs.reset_hw_ctx_wrap(dc, context);

diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
index ba4c33500a6d2f20fae61cb5578fd93690445df0..4d9c64d982d71bbff6974549bf2ac3c05dc8c719 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
@@ -2260,9 +2260,6 @@ static bool dcn31_resource_construct(
        dc->caps.color.mpc.ogam_rom_caps.hlg = 0;
        dc->caps.color.mpc.ocsc = 1;
 
-       /* Use pipe context based otg sync logic */
-       dc->config.use_pipe_ctx_sync_logic = true;
-
        /* read VBIOS LTTPR caps */
        {
                if (ctx->dc_bios->funcs->get_lttpr_caps) {

diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
index 943240e2809e95cff2d1a9d4e9a86d9ec57f929f..890280026e69406a68b2dc1953055e68a423a15f 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
@@ -382,7 +382,6 @@ struct pipe_ctx {
        struct pll_settings pll_settings;
 
        uint8_t pipe_idx;
-       uint8_t pipe_idx_syncd;
 
        struct pipe_ctx *top_pipe;
        struct pipe_ctx *bottom_pipe;

diff --git a/drivers/gpu/drm/amd/display/dc/inc/resource.h b/drivers/gpu/drm/amd/display/dc/inc/resource.h
index ee4a5df428e36778171de2d2455337f56c6c5176..e589cbe673076c8febc92365fcb52f599f1a4ab6 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/resource.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/resource.h
@@ -34,10 +34,6 @@
 #define MEMORY_TYPE_HBM 2
 
 
-#define IS_PIPE_SYNCD_VALID(pipe) ((((pipe)->pipe_idx_syncd) & 0x80)?1:0)
-#define GET_PIPE_SYNCD_FROM_PIPE(pipe) ((pipe)->pipe_idx_syncd & 0x7F)
-#define SET_PIPE_SYNCD_TO_PIPE(pipe, pipe_syncd) ((pipe)->pipe_idx_syncd = (0x80 | pipe_syncd))
-
 enum dce_version resource_parse_asic_id(
                struct hw_asic_id asic_id);
 
@@ -212,11 +208,4 @@ struct hpo_dp_link_encoder *resource_get_hpo_dp_link_enc_for_det_lt(
                const struct dc_link *link);
 #endif
 
-void reset_syncd_pipes_from_disabled_pipes(struct dc *dc,
-       struct dc_state *context);
-
-void check_syncd_pipes_for_disabled_master_pipe(struct dc *dc,
-       struct dc_state *context,
-       uint8_t disabled_master_pipe_idx);
-
 #endif /* DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ */