r8a73a4-ape6evm-reference.dtb \
        sh7372-mackerel.dtb
  dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \
 -      r7s72100-genmai-reference.dtb \
 +      r7s72100-genmai.dtb \
+       r8a7791-henninger.dtb \
        r8a7791-koelsch.dtb \
        r8a7790-lager.dtb
  dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_arria5_socdk.dtb \
 
  
        chosen {
                bootargs = "console=ttyS0,115200n8 earlyprintk";
+               stdout-path = &uart0;
        };
  
 +      mbus {
 +              pcie-controller {
 +                      status = "okay";
 +
 +                      pcie@1,0 {
 +                              status = "okay";
 +                      };
 +              };
 +        };
 +
        ocp@f1000000 {
-               pinctrl@10000 {
+               pin-controller@10000 {
                        pmx_usb_led: pmx-usb-led {
                                marvell,pins = "mpp12";
                                marvell,function = "gpo";
 
  / {
        model = "ZyXEL NSA310";
  
 +      mbus {
 +              pcie-controller {
 +                      status = "okay";
 +
 +                      pcie@1,0 {
 +                              status = "okay";
 +                      };
 +              };
 +      };
 +
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
  
-                       pmx_usb_power_off: pmx-usb-power-off {
+                       pmx_usb_power: pmx-usb-power {
                                marvell,pins = "mpp21";
                                marvell,function = "gpio";
                        };
 
                >;
        };
  
 +      debug_leds: pinmux_debug_led_pins {
 +              pinctrl-single,pins = <
 +                      OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4)       /* mcbsp1_clkx.gpio_162 */
 +              >;
 +      };
 +
+       mcspi4_pins: pinmux_mcspi4_pins {
+               pinctrl-single,pins = <
+                       0x15c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_clk */
+                       0x162 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_somi */
+                       0x160 (PIN_OUTPUT | MUX_MODE1) /* mcspi4_simo */
+                       0x166 (PIN_OUTPUT | MUX_MODE1) /* mcspi4_cs0 */
+               >;
+       };
+ 
        mmc1_pins: pinmux_mmc1_pins {
                pinctrl-single,pins = <
                        0x114 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_clk */
 
        };
  };
  
 -
 +&scif0 {
 +      pinctrl-0 = <&scif0_pins>;
 +      pinctrl-names = "default";
 +
 +      status = "okay";
 +};
 +
 +&scif1 {
 +      pinctrl-0 = <&scif1_pins>;
 +      pinctrl-names = "default";
 +
 +      status = "okay";
 +};
 +
+ &msiof1 {
+       pinctrl-0 = <&msiof1_pins>;
+       pinctrl-names = "default";
+ 
+       status = "okay";
+ 
+       pmic: pmic@0 {
+               compatible = "renesas,r2a11302ft";
+               reg = <0>;
+               spi-max-frequency = <6000000>;
+               spi-cpol;
+               spi-cpha;
+       };
+ };
+ 
  &sdhi0 {
        pinctrl-0 = <&sdhi0_pins>;
        pinctrl-names = "default";
 
        };
  };
  
+ &i2c6 {
+       status = "okay";
+       clock-frequency = <100000>;
+ };
+ 
  &pfc {
 -      pinctrl-0 = <&du_pins &scif0_pins &scif1_pins>;
 +      pinctrl-0 = <&du_pins>;
        pinctrl-names = "default";
  
-       i2c2_pins: i2c {
+       i2c2_pins: i2c2 {
                renesas,groups = "i2c2";
                renesas,function = "i2c2";
        };
 
                        clocks = <&apb1_gates 3>;
                        clock-frequency = <100000>;
                        status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                };
  
 -              i2c4: i2c@01c2bc00 {
 +              i2c4: i2c@01c2c000 {
                        compatible = "allwinner,sun4i-i2c";
 -                      reg = <0x01c2bc00 0x400>;
 +                      reg = <0x01c2c000 0x400>;
                        interrupts = <0 89 4>;
                        clocks = <&apb1_gates 15>;
                        clock-frequency = <100000>;
 
  #define OMAP3630_CORE2_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x25a0) (val)
  #define OMAP3_WKUP_IOPAD(pa, val)     OMAP_IOPAD_OFFSET((pa), 0x2a00) (val)
  #define AM33XX_IOPAD(pa, val)         OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
- #define OMAP4_CORE_IOPAD(pa, val)     OMAP_IOPAD_OFFSET((pa), 0x0040) (val)
- #define OMAP4_WKUP_IOPAD(pa, val)     OMAP_IOPAD_OFFSET((pa), 0xe040) (val)
  #define AM4372_IOPAD(pa, val)         OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
- #define OMAP5_CORE_IOPAD(pa, val)     OMAP_IOPAD_OFFSET((pa), 0x2840) (val)
- #define OMAP5_WKUP_IOPAD(pa, val)     OMAP_IOPAD_OFFSET((pa), 0xc840) (val)
  #define DRA7XX_CORE_IOPAD(pa, val)    OMAP_IOPAD_OFFSET((pa), 0x3400) (val)
  
+ /*
+  * Macros to allow using the offset from the padconf physical address
+  * instead  of the offset from padconf base.
+  */
+ #define OMAP_PADCONF_OFFSET(offset, base_offset)      ((offset) - (base_offset))
+ 
+ #define OMAP4_IOPAD(offset, val)      OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
+ #define OMAP5_IOPAD(offset, val)      OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
+ 
 +/*
 + * Define some commonly used pins configured by the boards.
 + * Note that some boards use alternative pins, so check
 + * the schematics before using these.
 + */
 +#define OMAP3_UART1_RX                0x152
 +#define OMAP3_UART2_RX                0x14a
 +#define OMAP3_UART3_RX                0x16e
 +#define OMAP4_UART2_RX                0xdc
 +#define OMAP4_UART3_RX                0x104
 +#define OMAP4_UART4_RX                0x11c
 +
  #endif