pinctrl: renesas: sh7786: Optimize fixed-width reserved fields

Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.

This reduces kernel size by 79 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/22487451ff7d8cce0182354c9553f3b171cc34d9.1649865241.git.geert+renesas@glider.be

diff --git a/drivers/pinctrl/renesas/pfc-sh7786.c b/drivers/pinctrl/renesas/pfc-sh7786.c
index 4ed31d78fe30f35f92eb8553b5b05c983987d6fa..f09f4a76901088b4c42fd46162717d662feeee6e 100644 (file)
--- a/drivers/pinctrl/renesas/pfc-sh7786.c
+++ b/drivers/pinctrl/renesas/pfc-sh7786.c
@@ -666,15 +666,12 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
                PD1_FN, PD1_OUT, PD1_IN, 0,
                PD0_FN, PD0_OUT, PD0_IN, 0 ))
        },
-       { PINMUX_CFG_REG("PECR", 0xffcc0008, 16, 2, GROUP(
+       { PINMUX_CFG_REG_VAR("PECR", 0xffcc0008, 16,
+                            GROUP(2, 2, -12),
+                            GROUP(
                PE7_FN, PE7_OUT, PE7_IN, 0,
                PE6_FN, PE6_OUT, PE6_IN, 0,
-               0, 0, 0, 0,
-               0, 0, 0, 0,
-               0, 0, 0, 0,
-               0, 0, 0, 0,
-               0, 0, 0, 0,
-               0, 0, 0, 0, ))
+               /* RESERVED [12] */ ))
        },
        { PINMUX_CFG_REG("PFCR", 0xffcc000a, 16, 2, GROUP(
                PF7_FN, PF7_OUT, PF7_IN, 0,
@@ -686,15 +683,13 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
                PF1_FN, PF1_OUT, PF1_IN, 0,
                PF0_FN, PF0_OUT, PF0_IN, 0 ))
        },
-       { PINMUX_CFG_REG("PGCR", 0xffcc000c, 16, 2, GROUP(
+       { PINMUX_CFG_REG_VAR("PGCR", 0xffcc000c, 16,
+                            GROUP(2, 2, 2, -10),
+                            GROUP(
                PG7_FN, PG7_OUT, PG7_IN, 0,
                PG6_FN, PG6_OUT, PG6_IN, 0,
                PG5_FN, PG5_OUT, PG5_IN, 0,
-               0, 0, 0, 0,
-               0, 0, 0, 0,
-               0, 0, 0, 0,
-               0, 0, 0, 0,
-               0, 0, 0, 0, ))
+               /* RESERVED [10] */ ))
        },
        { PINMUX_CFG_REG("PHCR", 0xffcc000e, 16, 2, GROUP(
                PH7_FN, PH7_OUT, PH7_IN, 0,