static SUNXI_CCU_M(wb_div_a83_clk, "wb-div", "pll-de", 0x0c, 8, 4,
                   CLK_SET_RATE_PARENT);
 
-static struct ccu_common *sun50i_h6_de3_clks[] = {
-       &mixer0_clk.common,
-       &mixer1_clk.common,
-       &wb_clk.common,
-
-       &bus_mixer0_clk.common,
-       &bus_mixer1_clk.common,
-       &bus_wb_clk.common,
-
-       &mixer0_div_clk.common,
-       &mixer1_div_clk.common,
-       &wb_div_clk.common,
-
-       &bus_rot_clk.common,
-       &rot_clk.common,
-       &rot_div_clk.common,
-};
-
 static struct ccu_common *sun8i_a83t_de2_clks[] = {
        &mixer0_clk.common,
        &mixer1_clk.common,
        .num    = CLK_NUMBER_WITH_ROT,
 };
 
-static struct clk_hw_onecell_data sun50i_h6_de3_hw_clks = {
-       .hws    = {
-               [CLK_MIXER0]            = &mixer0_clk.common.hw,
-               [CLK_MIXER1]            = &mixer1_clk.common.hw,
-               [CLK_WB]                = &wb_clk.common.hw,
-               [CLK_ROT]               = &rot_clk.common.hw,
-
-               [CLK_BUS_MIXER0]        = &bus_mixer0_clk.common.hw,
-               [CLK_BUS_MIXER1]        = &bus_mixer1_clk.common.hw,
-               [CLK_BUS_WB]            = &bus_wb_clk.common.hw,
-               [CLK_BUS_ROT]           = &bus_rot_clk.common.hw,
-
-               [CLK_MIXER0_DIV]        = &mixer0_div_clk.common.hw,
-               [CLK_MIXER1_DIV]        = &mixer1_div_clk.common.hw,
-               [CLK_WB_DIV]            = &wb_div_clk.common.hw,
-               [CLK_ROT_DIV]           = &rot_div_clk.common.hw,
-       },
-       .num    = CLK_NUMBER_WITH_ROT,
-};
-
 static struct ccu_reset_map sun8i_a83t_de2_resets[] = {
        [RST_MIXER0]    = { 0x08, BIT(0) },
        /*
        [RST_WB]        = { 0x08, BIT(2) },
 };
 
-static struct ccu_reset_map sun50i_h6_de3_resets[] = {
-       [RST_MIXER0]    = { 0x08, BIT(0) },
-       [RST_MIXER1]    = { 0x08, BIT(1) },
-       [RST_WB]        = { 0x08, BIT(2) },
-       [RST_ROT]       = { 0x08, BIT(3) },
-};
-
 static const struct sunxi_ccu_desc sun8i_a83t_de2_clk_desc = {
        .ccu_clks       = sun8i_a83t_de2_clks,
        .num_ccu_clks   = ARRAY_SIZE(sun8i_a83t_de2_clks),
        .num_resets     = ARRAY_SIZE(sun50i_h5_de2_resets),
 };
 
-static const struct sunxi_ccu_desc sun50i_h6_de3_clk_desc = {
-       .ccu_clks       = sun50i_h6_de3_clks,
-       .num_ccu_clks   = ARRAY_SIZE(sun50i_h6_de3_clks),
-
-       .hw_clks        = &sun50i_h6_de3_hw_clks,
-
-       .resets         = sun50i_h6_de3_resets,
-       .num_resets     = ARRAY_SIZE(sun50i_h6_de3_resets),
-};
-
 static const struct sunxi_ccu_desc sun8i_v3s_de2_clk_desc = {
        .ccu_clks       = sun8i_v3s_de2_clks,
        .num_ccu_clks   = ARRAY_SIZE(sun8i_v3s_de2_clks),
        },
        {
                .compatible = "allwinner,sun50i-h6-de3-clk",
-               .data = &sun50i_h6_de3_clk_desc,
+               .data = &sun50i_h5_de2_clk_desc,
        },
        { }
 };