]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
ASoC: fsl_xcvr: Fix channel swap issue with ARC
authorShengjiu Wang <shengjiu.wang@nxp.com>
Fri, 10 Sep 2021 09:18:30 +0000 (17:18 +0800)
committerMark Brown <broonie@kernel.org>
Tue, 21 Sep 2021 12:23:36 +0000 (13:23 +0100)
With pause and resume test for ARC, there is occasionally
channel swap issue. The reason is that currently driver set
the DPATH out of reset first, then start the DMA, the first
data got from FIFO may not be the Left channel.

Moving DPATH out of reset operation after the dma enablement
to fix this issue.

Fixes: 28564486866f ("ASoC: fsl_xcvr: Add XCVR ASoC CPU DAI driver")
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Link: https://lore.kernel.org/r/1631265510-27384-1-git-send-email-shengjiu.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/fsl/fsl_xcvr.c

index 7ba2fd15132d9b966e4b86d5459c707e880aac26..d0556c79fdb1531aaa6f84d53c2e6fcc3da82c24 100644 (file)
@@ -487,8 +487,9 @@ static int fsl_xcvr_prepare(struct snd_pcm_substream *substream,
                return ret;
        }
 
-       /* clear DPATH RESET */
+       /* set DPATH RESET */
        m_ctl |= FSL_XCVR_EXT_CTRL_DPTH_RESET(tx);
+       v_ctl |= FSL_XCVR_EXT_CTRL_DPTH_RESET(tx);
        ret = regmap_update_bits(xcvr->regmap, FSL_XCVR_EXT_CTRL, m_ctl, v_ctl);
        if (ret < 0) {
                dev_err(dai->dev, "Error while setting EXT_CTRL: %d\n", ret);
@@ -590,10 +591,6 @@ static void fsl_xcvr_shutdown(struct snd_pcm_substream *substream,
                val  |= FSL_XCVR_EXT_CTRL_CMDC_RESET(tx);
        }
 
-       /* set DPATH RESET */
-       mask |= FSL_XCVR_EXT_CTRL_DPTH_RESET(tx);
-       val  |= FSL_XCVR_EXT_CTRL_DPTH_RESET(tx);
-
        ret = regmap_update_bits(xcvr->regmap, FSL_XCVR_EXT_CTRL, mask, val);
        if (ret < 0) {
                dev_err(dai->dev, "Err setting DPATH RESET: %d\n", ret);
@@ -643,6 +640,16 @@ static int fsl_xcvr_trigger(struct snd_pcm_substream *substream, int cmd,
                        dev_err(dai->dev, "Failed to enable DMA: %d\n", ret);
                        return ret;
                }
+
+               /* clear DPATH RESET */
+               ret = regmap_update_bits(xcvr->regmap, FSL_XCVR_EXT_CTRL,
+                                        FSL_XCVR_EXT_CTRL_DPTH_RESET(tx),
+                                        0);
+               if (ret < 0) {
+                       dev_err(dai->dev, "Failed to clear DPATH RESET: %d\n", ret);
+                       return ret;
+               }
+
                break;
        case SNDRV_PCM_TRIGGER_STOP:
        case SNDRV_PCM_TRIGGER_SUSPEND: