arm64: dts: qcom: sm8150-hdk: enable HDMI output

Add DSI outputs and link them to the onboard Lontium LT9611 DSI-to-HDMI
bridge, enabling HDMI output on this board. While adding the display
resources, also drop the headless ("amd,imageon") compat string from the
GPU node, since the board now has output.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20231215174152.315403-3-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sm8150-hdk.dts b/arch/arm64/boot/dts/qcom/sm8150-hdk.dts
index bb161b536da466098aa75c4d5d9e8875697a002d..6a036f9ba1c9d2760b51bfb9ef61d1499edb6a0f 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8150-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8150-hdk.dts
@@ -54,6 +54,17 @@
                        gpios = <&pm8150_gpios 6 GPIO_ACTIVE_LOW>;
                };
        };
+
+       hdmi-out {
+               compatible = "hdmi-connector";
+               type = "a";
+
+               port {
+                       hdmi_con: endpoint {
+                               remote-endpoint = <&lt9611_out>;
+                       };
+               };
+       };
 };
 
 &apps_rsc {
@@ -359,12 +370,112 @@
        status = "okay";
 };
 
+&gpi_dma1 {
+       status = "okay";
+};
+
 &gpu {
-       /*
-        * NOTE: "amd,imageon" makes Adreno start in headless mode, remove it
-        * after display support is added on this board.
-        */
-       compatible = "qcom,adreno-640.1", "qcom,adreno", "amd,imageon";
+       status = "okay";
+};
+
+&i2c9 {
+       status = "okay";
+       clock-frequency = <400000>;
+
+       lt9611_codec: hdmi-bridge@3b {
+               compatible = "lontium,lt9611";
+               reg = <0x3b>;
+               #sound-dai-cells = <1>;
+
+               interrupts-extended = <&tlmm 9 IRQ_TYPE_EDGE_FALLING>;
+
+               reset-gpios = <&tlmm 7 GPIO_ACTIVE_HIGH>;
+
+               vdd-supply = <&vreg_s4a_1p8>;
+               vcc-supply = <&vreg_bob>;
+
+               pinctrl-names = "default";
+               pinctrl-0 = <&lt9611_irq_pin>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+
+                               lt9611_a: endpoint {
+                                       remote-endpoint = <&mdss_dsi0_out>;
+                               };
+                       };
+
+                       port@1 {
+                               reg = <1>;
+
+                               lt9611_b: endpoint {
+                                       remote-endpoint = <&mdss_dsi1_out>;
+                               };
+                       };
+
+                       port@2 {
+                               reg = <2>;
+
+                               lt9611_out: endpoint {
+                                       remote-endpoint = <&hdmi_con>;
+                               };
+                       };
+               };
+       };
+};
+
+&mdss {
+       status = "okay";
+};
+
+&mdss_dsi0 {
+       status = "okay";
+       vdda-supply = <&vreg_l3c_1p2>;
+
+       qcom,dual-dsi-mode;
+       qcom,master-dsi;
+
+       ports {
+               port@1 {
+                       endpoint {
+                               remote-endpoint = <&lt9611_a>;
+                               data-lanes = <0 1 2 3>;
+                       };
+               };
+       };
+};
+
+&mdss_dsi0_phy {
+       status = "okay";
+       vdds-supply = <&vreg_l5a_0p875>;
+};
+
+&mdss_dsi1 {
+       vdda-supply = <&vreg_l3c_1p2>;
+
+       qcom,dual-dsi-mode;
+
+       /* DSI1 is slave, so use DSI0 clocks */
+       assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
+
+       status = "okay";
+
+       ports {
+               port@1 {
+                       endpoint {
+                               remote-endpoint = <&lt9611_b>;
+                               data-lanes = <0 1 2 3>;
+                       };
+               };
+       };
+};
+
+&mdss_dsi1_phy {
+       vdds-supply = <&vreg_l5a_0p875>;
        status = "okay";
 };
 
@@ -402,6 +513,13 @@
 
 &tlmm {
        gpio-reserved-ranges = <0 4>, <126 4>;
+
+       lt9611_irq_pin: lt9611-irq-state {
+               pins = "gpio9";
+               function = "gpio";
+               bias-disable;
+       };
+
 };
 
 &uart2 {