This is needed for vega12 and vega20 which do not support legacy
powerstate. With this new framework, the DAL clocks limits can also
be honored on these asics.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
        return 0;
 }
 
+int phm_apply_clock_adjust_rules(struct pp_hwmgr *hwmgr)
+{
+       PHM_FUNC_CHECK(hwmgr);
+
+       if (hwmgr->hwmgr_func->apply_clocks_adjust_rules != NULL)
+               return hwmgr->hwmgr_func->apply_clocks_adjust_rules(hwmgr);
+       return 0;
+}
+
 int phm_powerdown_uvd(struct pp_hwmgr *hwmgr)
 {
        PHM_FUNC_CHECK(hwmgr);
 
        if (skip)
                return 0;
 
+       if (!hwmgr->ps)
+               /*
+                * for vega12/vega20 which does not support power state manager
+                * DAL clock limits should also be honoured
+                */
+               phm_apply_clock_adjust_rules(hwmgr);
+
        phm_display_configuration_changed(hwmgr);
 
        if (hwmgr->ps)
 
                                   struct pp_power_state *adjusted_ps,
                             const struct pp_power_state *current_ps);
 
+extern int phm_apply_clock_adjust_rules(struct pp_hwmgr *hwmgr);
+
 extern int phm_force_dpm_levels(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level);
 extern int phm_display_configuration_changed(struct pp_hwmgr *hwmgr);
 extern int phm_notify_smc_display_config_after_ps_adjustment(struct pp_hwmgr *hwmgr);
 
                                struct pp_power_state  *prequest_ps,
                        const struct pp_power_state *pcurrent_ps);
 
+       int (*apply_clocks_adjust_rules)(struct pp_hwmgr *hwmgr);
+
        int (*force_dpm_level)(struct pp_hwmgr *hw_mgr,
                                        enum amd_dpm_forced_level level);