{
struct mlx4_priv *priv = mlx4_priv(dev);
struct msix_entry *entries;
- int i;
+ int i, nreq = 0;
if (msi_x) {
- int nreq = dev->caps.num_ports * num_online_cpus() + MSIX_LEGACY_SZ;
+ nreq = dev->caps.num_ports * num_online_cpus() + MSIX_LEGACY_SZ;
nreq = min_t(int, dev->caps.num_eqs - dev->caps.reserved_eqs,
nreq);
for (i = 0; i < nreq; ++i)
entries[i].entry = i;
+ mlx4_info(dev, "Enabling %d MSI-X vectors, eqs %d rsvd_eqs %d msi_x %d\n",
+ nreq, dev->caps.num_eqs, dev->caps.reserved_eqs,
+ msi_x);
nreq = pci_enable_msix_range(dev->persist->pdev, entries, 2,
nreq);
priv->eq_table.eq[i].irq = entries[i].vector;
dev->flags |= MLX4_FLAG_MSI_X;
+ mlx4_info(dev, "Successfully allocated %d MSI-X vectors, comp_pool %d\n",
+ nreq, dev->caps.comp_pool);
kfree(entries);
return;
}
no_msi:
+ mlx4_info(dev, "No MSI-X vectors, nreq/errno %d msi_x %d\n",
+ nreq, msi_x);
dev->caps.num_comp_vectors = 1;
dev->caps.comp_pool = 0;