/* Generic bitfield decoder */
struct field {
- unsigned start_bit;
+ unsigned int start_bit;
char **str;
- unsigned stringlen;
+ unsigned int stringlen;
};
struct numfield {
- unsigned start, end;
+ unsigned int start, end;
char *name;
char *fmt;
int force;
struct numfield *fields);
#define MASK(x) ((1ULL << (1 + (x))) - 1)
-#define EXTRACT(v, a, b) (((v) >> (a)) & MASK((b)-(a)))
+#define EXTRACT(v, a, b) (((v) >> (a)) & MASK((b) - (a)))
static inline int test_prefix(int nr, uint32_t value)
{
/* Ancillary routines */
-unsigned bitfield_msg(char *buf, size_t len, const char **bitarray,
- unsigned array_len,
- unsigned bit_offset, unsigned ignore_bits,
- uint64_t status);
+unsigned int bitfield_msg(char *buf, size_t len, const char **bitarray,
+ unsigned int array_len,
+ unsigned int bit_offset, unsigned int ignore_bits,
+ uint64_t status);
*
*/
-
#ifndef __NON_STANDARD_AMPERE_H
#define __NON_STANDARD_AMPERE_H
*
*/
-
#ifndef __NON_STANDARD_JAGUAR_H
#define __NON_STANDARD_JAGUAR_H
struct jm_common_sec_tail common_tail;
};
-
/*GIC IP */
struct jm_payload6_type_sec {
struct jm_common_sec_head common_head;
JM_PAYLOAD_FIELD_REGS_DUMP,
};
-
#define JM_SNPRINTF mce_snprintf
#endif
*
*/
-
#ifndef __NON_STANDARD_YITIAN_H
#define __NON_STANDARD_YITIAN_H
};
int record_yitian_ddr_reg_dump_event(struct ras_ns_ev_decoder *ev_decoder,
- struct ras_yitian_ddr_payload_event *ev);
+ struct ras_yitian_ddr_payload_event *ev);
void decode_yitian_ddr_payload_err_regs(struct ras_ns_ev_decoder *ev_decoder,
- struct trace_seq *s,
- const struct yitian_ddr_payload_type_sec *err,
- struct ras_events *ras);
+ struct trace_seq *s,
+ const struct yitian_ddr_payload_type_sec *err,
+ struct ras_events *ras);
#endif
void display_raw_data(struct trace_seq *s,
const uint8_t *buf,
- uint32_t datalen)
+ uint32_t datalen)
{
int i = 0, line_count = 0;
// Upstream kKernels up to version 6.10 don't decode UEFI 2.6+ N.17 table
if (tep_get_field_val(s, event, "pei_len", record, &val, 1) >= 0) {
-
ev.pei_len = val;
trace_seq_printf(s, " ARM Processor Err Info data len: %d\n",
ev.pei_len);
if (ras_handle_cpu_error(s, record, event, &ev, now) < 0)
printf("Can't do CPU fault isolation!\n");
#endif
-
}
/* Insert data into the SGBD */
uint64_t virt_fault_addr;
uint64_t physical_fault_addr;
};
+
#pragma pack()
int ras_arm_event_handler(struct trace_seq *s,
int cpu;
};
-
/* Should match the code at Kernel's include/linux/edac.c */
enum hw_event_mc_err_type {
HW_EVENT_ERR_CORRECTED,
#include "ras-events.h"
#include <traceevent/event-parse.h>
-extern int ras_extlog_mem_event_handler(struct trace_seq *s,
- struct tep_record *record,
- struct tep_event *event,
- void *context);
-
+int ras_extlog_mem_event_handler(struct trace_seq *s,
+ struct tep_record *record,
+ struct tep_event *event,
+ void *context);
#endif
#include <syslog.h>
+#include "ras-record.h"
+
/*
* Logging macros
*/
#define TOOL_NAME "rasdaemon"
#endif
-#define SYSLOG (1 << 0)
-#define TERM (1 << 1)
+#define SYSLOG BIT(0)
+#define TERM BIT(1)
#define ALL (SYSLOG | TERM)
/* TODO: global logging limit mask */
uint8_t cpuvendor;
uint64_t synd; /* MCA_SYND MSR: only valid on SMCA systems */
uint64_t ipid; /* MCA_IPID MSR: only valid on SMCA systems */
- uint64_t ppin;
+ uint64_t ppin;
uint32_t microcode;
int32_t vdata_len;
const uint64_t *vdata;
};
#define mce_snprintf(buf, fmt, arg...) do { \
- unsigned __n = strlen(buf); \
- unsigned __len = sizeof(buf) - __n; \
+ unsigned int __n = strlen(buf); \
+ unsigned int __len = sizeof(buf) - __n; \
if (!__len) \
break; \
if (__n) { \
} while (0)
/* register and handling routines */
-int register_mce_handler(struct ras_events *ras, unsigned ncpus);
+int register_mce_handler(struct ras_events *ras, unsigned int ncpus);
int ras_mce_event_handler(struct trace_seq *s,
struct tep_record *record,
struct tep_event *event, void *context);
/* enables intel iMC logs */
-int set_intel_imc_log(enum cputype cputype, unsigned ncpus);
+int set_intel_imc_log(enum cputype cputype, unsigned int ncpus);
/* Undertake AMD SMCA Error Decoding */
void decode_smca_error(struct mce_event *e, struct mce_priv *m);
/* Software defined banks */
#define MCE_EXTENDED_BANK 128
-#define MCI_THRESHOLD_OVER (1ULL<<48) /* threshold error count overflow */
+#define MCI_THRESHOLD_OVER BIT_ULL(48) /* threshold error count overflow */
-#define MCI_STATUS_VAL (1ULL<<63) /* valid error */
-#define MCI_STATUS_OVER (1ULL<<62) /* previous errors lost */
-#define MCI_STATUS_UC (1ULL<<61) /* uncorrected error */
-#define MCI_STATUS_EN (1ULL<<60) /* error enabled */
-#define MCI_STATUS_MISCV (1ULL<<59) /* misc error reg. valid */
-#define MCI_STATUS_ADDRV (1ULL<<58) /* addr reg. valid */
-#define MCI_STATUS_PCC (1ULL<<57) /* processor context corrupt */
-#define MCI_STATUS_S (1ULL<<56) /* signalled */
-#define MCI_STATUS_AR (1ULL<<55) /* action-required */
+#define MCI_STATUS_VAL BIT_ULL(63) /* valid error */
+#define MCI_STATUS_OVER BIT_ULL(62) /* previous errors lost */
+#define MCI_STATUS_UC BIT_ULL(61) /* uncorrected error */
+#define MCI_STATUS_EN BIT_ULL(60) /* error enabled */
+#define MCI_STATUS_MISCV BIT_ULL(59) /* misc error reg. valid */
+#define MCI_STATUS_ADDRV BIT_ULL(58) /* addr reg. valid */
+#define MCI_STATUS_PCC BIT_ULL(57) /* processor context corrupt */
+#define MCI_STATUS_S BIT_ULL(56) /* signalled */
+#define MCI_STATUS_AR BIT_ULL(55) /* action-required */
/* AMD-specific bits */
-#define MCI_STATUS_TCC (1ULL<<55) /* Task context corrupt */
-#define MCI_STATUS_SYNDV (1ULL<<53) /* synd reg. valid */
+#define MCI_STATUS_TCC BIT_ULL(55) /* Task context corrupt */
+#define MCI_STATUS_SYNDV BIT_ULL(53) /* synd reg. valid */
/* uncorrected error,deferred exception */
-#define MCI_STATUS_DEFERRED (1ULL<<44)
-#define MCI_STATUS_POISON (1ULL<<43) /* access poisonous data */
+#define MCI_STATUS_DEFERRED BIT_ULL(44)
+#define MCI_STATUS_POISON BIT_ULL(43) /* access poisonous data */
-#define MCG_STATUS_RIPV (1ULL<<0) /* restart ip valid */
-#define MCG_STATUS_EIPV (1ULL<<1) /* eip points to correct instruction */
-#define MCG_STATUS_MCIP (1ULL<<2) /* machine check in progress */
-#define MCG_STATUS_LMCE (1ULL<<3) /* local machine check signaled */
+#define MCG_STATUS_RIPV BIT_ULL(0) /* restart ip valid */
+#define MCG_STATUS_EIPV BIT_ULL(1) /* eip points to correct instruction */
+#define MCG_STATUS_MCIP BIT_ULL(2) /* machine check in progress */
+#define MCG_STATUS_LMCE BIT_ULL(3) /* local machine check signaled */
/* Those functions are defined on per-cpu vendor C files */
int parse_intel_event(struct ras_events *ras, struct mce_event *e);
#ifndef __RAS_PAGE_ISOLATION_H
#define __RAS_PAGE_ISOLATION_H
-#include <time.h>
#include <stdbool.h>
+#include <time.h>
+
+#include "ras-record.h"
#include "rbtree.h"
#define PAGE_SHIFT 12
-#define PAGE_SIZE (1 << PAGE_SHIFT)
-#define PAGE_MASK (~(PAGE_SIZE-1))
+#define PAGE_SIZE BIT(PAGE_SHIFT)
+#define PAGE_MASK (~(PAGE_SIZE - 1))
struct config {
char *name;
};
void ras_page_account_init(void);
-void ras_record_page_error(unsigned long long addr, unsigned count, time_t time);
+void ras_record_page_error(unsigned long long addr,
+ unsigned int count, time_t time);
#endif
#include <stdbool.h>
#include "config.h"
-#define ARRAY_SIZE(x) (sizeof(x)/sizeof(*(x)))
+#define ARRAY_SIZE(x) (sizeof(x) / sizeof(*(x)))
#define BIT(nr) (1UL << (nr))
#define BIT_ULL(nr) (1ULL << (nr))
size_t num_fields;
};
-int ras_mc_event_opendb(unsigned cpu, struct ras_events *ras);
+int ras_mc_event_opendb(unsigned int cpu, struct ras_events *ras);
int ras_mc_event_closedb(unsigned int cpu, struct ras_events *ras);
int ras_mc_add_vendor_table(struct ras_events *ras, sqlite3_stmt **stmt,
const struct db_table_descriptor *db_tab);
int ras_store_cxl_memory_module_event(struct ras_events *ras, struct ras_cxl_memory_module_event *ev);
#else
-static inline int ras_mc_event_opendb(unsigned cpu, struct ras_events *ras) { return 0; };
+static inline int ras_mc_event_opendb(unsigned int cpu, struct ras_events *ras) { return 0; };
static inline int ras_mc_event_closedb(unsigned int cpu, struct ras_events *ras) { return 0; };
static inline int ras_store_mc_event(struct ras_events *ras, struct ras_mc_event *ev) { return 0; };
static inline int ras_store_aer_event(struct ras_events *ras, struct ras_aer_event *ev) { return 0; };
#include "ras-aer-handler.h"
/* Maximal length of backtrace. */
-#define MAX_BACKTRACE_SIZE (1024*1024)
+#define MAX_BACKTRACE_SIZE (1024 * 1024)
/* Amount of data received from one client for a message before reporting error. */
-#define MAX_MESSAGE_SIZE (4*MAX_BACKTRACE_SIZE)
+#define MAX_MESSAGE_SIZE (4 * MAX_BACKTRACE_SIZE)
/* Maximal number of characters read from socket at once. */
-#define INPUT_BUFFER_SIZE (8*1024)
+#define INPUT_BUFFER_SIZE (8 * 1024)
/* ABRT socket file */
#define ABRT_SOCKET "/var/run/abrt/abrt.socket"
const typeof( ((type *)0)->member ) *__mptr = (ptr); \
(type *)( (char *)__mptr - offsetof(type,member) );})
-struct rb_node
-{
+struct rb_node {
unsigned long rb_parent_color;
#define RB_RED 0
#define RB_BLACK 1
} __attribute__((aligned(sizeof(long))));
/* The alignment might seem pointless, but allegedly CRIS needs it */
-struct rb_root
-{
+struct rb_root {
struct rb_node *rb_node;
};
-
#define rb_parent(r) ((struct rb_node *)((r)->rb_parent_color & ~3))
#define rb_color(r) ((r)->rb_parent_color & 1)
#define rb_is_red(r) (!rb_color(r))
{
rb->rb_parent_color = (rb->rb_parent_color & 3) | (unsigned long)p;
}
+
static inline void rb_set_color(struct rb_node *rb, int color)
{
rb->rb_parent_color = (rb->rb_parent_color & ~1) | color;
#define RB_ROOT (struct rb_root) { NULL, }
#define rb_entry(ptr, type, member) container_of(ptr, type, member)
-#define RB_EMPTY_ROOT(root) ((root)->rb_node == NULL)
+#define RB_EMPTY_ROOT(root) ((root)->!rb_node)
#define RB_EMPTY_NODE(node) (rb_parent(node) == node)
#define RB_CLEAR_NODE(node) (rb_set_parent(node, node))
-extern void rb_insert_color(struct rb_node *, struct rb_root *);
-extern void rb_erase(struct rb_node *, struct rb_root *);
+void rb_insert_color(struct rb_node *node, struct rb_root *rb_root);
+void rb_erase(struct rb_node *node, struct rb_root *rb_root);
/* Find logical next and previous nodes in a tree */
-extern struct rb_node *rb_next(const struct rb_node *);
-extern struct rb_node *rb_prev(const struct rb_node *);
-extern struct rb_node *rb_first(const struct rb_root *);
-extern struct rb_node *rb_last(const struct rb_root *);
+struct rb_node *rb_next(const struct rb_node *node);
+struct rb_node *rb_prev(const struct rb_node *node);
+struct rb_node *rb_first(const struct rb_root *rb_root);
+struct rb_node *rb_last(const struct rb_root *rb_root);
/* Fast replacement of a single node without remove/rebalance/add/rebalance */
-extern void rb_replace_node(struct rb_node *victim, struct rb_node *new,
- struct rb_root *root);
+void rb_replace_node(struct rb_node *victim, struct rb_node *new,
+ struct rb_root *root);
-static inline void rb_link_node(struct rb_node * node, struct rb_node * parent,
- struct rb_node ** rb_link)
+static inline void rb_link_node(struct rb_node *node, struct rb_node *parent,
+ struct rb_node **rb_link)
{
- node->rb_parent_color = (unsigned long )parent;
- node->rb_left = node->rb_right = NULL;
+ node->rb_parent_color = (unsigned long)parent;
+ node->rb_left = NULL;
+ node->rb_right = NULL;
*rb_link = node;
}
waitpid(child, &status, 0);
if (WIFEXITED(status) && WEXITSTATUS(status)) {
log(SYSLOG, LOG_INFO, "Trigger %s exited with status %d",
- trigger, WEXITSTATUS(status));
+ trigger, WEXITSTATUS(status));
} else if (WIFSIGNALED(status)) {
log(SYSLOG, LOG_INFO, "Trigger %s killed by signal %d",
- trigger, WTERMSIG(status));
+ trigger, WTERMSIG(status));
}
}
}
if (trigger_dir) {
if (asprintf(&name, "%s/%s", trigger_dir, s) < 0)
return NULL;
- s = name;
+ s = name;
}
- rc = access(s, R_OK|X_OK);
+ rc = access(s, R_OK | X_OK);
if (!rc)
return(s);
#define __TRIGGER_H__
struct event_trigger {
- const char *name;
- void (*setup)(void);
+ const char *name;
+ void (*setup)(void);
};
const char *trigger_check(const char *s);
-void run_trigger(const char *trigger, char *argv[], char **env, const char* reporter);
+void run_trigger(const char *trigger, char *argv[], char **env, const char *reporter);
#endif