enum port port = encoder->port;
        i915_reg_t reg;
        u32 set_bits, wait_bits;
+       int ret;
 
        if (DISPLAY_VER(display) < 14)
                return;
        }
 
        intel_de_rmw(display, reg, 0, set_bits);
-       if (wait_for_us(intel_de_read(display, reg) & wait_bits, 100)) {
+
+       ret = intel_de_wait_custom(display, reg,
+                                  wait_bits, wait_bits,
+                                  100, 0, NULL);
+       if (ret) {
                drm_err(display->drm, "Timeout waiting for D2D Link enable for DDI/PORT_BUF_CTL %c\n",
                        port_name(port));
        }
        enum port port = encoder->port;
        i915_reg_t reg;
        u32 clr_bits, wait_bits;
+       int ret;
 
        if (DISPLAY_VER(display) < 14)
                return;
        }
 
        intel_de_rmw(display, reg, clr_bits, 0);
-       if (wait_for_us(!(intel_de_read(display, reg) & wait_bits), 100))
+
+       ret = intel_de_wait_custom(display, reg,
+                                  wait_bits, 0,
+                                  100, 0, NULL);
+       if (ret)
                drm_err(display->drm, "Timeout waiting for D2D Link disable for DDI/PORT_BUF_CTL %c\n",
                        port_name(port));
 }