stmmac: intel: add pcs-xpcs for Intel mGbE controller

Intel mGbE controller such as those in EHL & TGL uses pcs-xpcs driver for
SGMII interface. To ensure mdio bus scanning does not assign phy_device
to MDIO-addressable entities like intel serdes and pcs-xpcs, we set up
to phy_mask to skip them.

Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c
index 0b64f7710d174836e540fef7473ef6a80e010bda..c4964677387122d1f4afb76c1d00ed1e2c832a3b 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c
@@ -9,6 +9,9 @@
 #include "dwmac4.h"
 #include "stmmac.h"
 
+#define INTEL_MGBE_ADHOC_ADDR  0x15
+#define INTEL_MGBE_XPCS_ADDR   0x16
+
 struct intel_priv_data {
        int mdio_adhoc_addr;    /* mdio address for serdes & etc */
 };
@@ -333,6 +336,16 @@ static int intel_mgbe_common_data(struct pci_dev *pdev,
        /* Use the last Rx queue */
        plat->vlan_fail_q = plat->rx_queues_to_use - 1;
 
+       /* Intel mgbe SGMII interface uses pcs-xcps */
+       if (plat->phy_interface == PHY_INTERFACE_MODE_SGMII) {
+               plat->mdio_bus_data->has_xpcs = true;
+               plat->mdio_bus_data->xpcs_an_inband = true;
+       }
+
+       /* Ensure mdio bus scan skips intel serdes and pcs-xpcs */
+       plat->mdio_bus_data->phy_mask = 1 << INTEL_MGBE_ADHOC_ADDR;
+       plat->mdio_bus_data->phy_mask |= 1 << INTEL_MGBE_XPCS_ADDR;
+
        return 0;
 }
 
@@ -664,7 +677,7 @@ static int intel_eth_pci_probe(struct pci_dev *pdev,
        pci_set_master(pdev);
 
        plat->bsp_priv = intel_priv;
-       intel_priv->mdio_adhoc_addr = 0x15;
+       intel_priv->mdio_adhoc_addr = INTEL_MGBE_ADHOC_ADDR;
 
        ret = info->setup(pdev, plat);
        if (ret)