arm64: dts: exynos990: Add clock management unit nodes

Add CMU nodes for:
- cmu_top: provides clocks for other blocks
- cmu_hsi0: provides clocks for usb31

Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org>
Link: https://lore.kernel.org/r/20241224-cmu-v3-1-33ca24b2413c@mentallysanemainliners.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

diff --git a/arch/arm64/boot/dts/exynos/exynos990.dtsi b/arch/arm64/boot/dts/exynos/exynos990.dtsi
index c53df5d7c3a320be428bbc46d002288be7ced565..9d017dbed9523e874891f13258d331c3e829ca03 100644 (file)
--- a/arch/arm64/boot/dts/exynos/exynos990.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos990.dtsi
@@ -5,6 +5,7 @@
  * Copyright (c) 2024, Igor Belwon <igor.belwon@mentallysanemainliners.org>
  */
 
+#include <dt-bindings/clock/samsung,exynos990.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
 / {
@@ -206,6 +207,23 @@
                        interrupts = <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>;
                };
 
+               cmu_hsi0: clock-controller@10a00000 {
+                       compatible = "samsung,exynos990-cmu-hsi0";
+                       reg = <0x10a00000 0x8000>;
+                       #clock-cells = <1>;
+
+                       clocks = <&oscclk>,
+                                <&cmu_top CLK_DOUT_CMU_HSI0_BUS>,
+                                <&cmu_top CLK_DOUT_CMU_HSI0_USB31DRD>,
+                                <&cmu_top CLK_DOUT_CMU_HSI0_USBDP_DEBUG>,
+                                <&cmu_top CLK_DOUT_CMU_HSI0_DPGTC>;
+                       clock-names = "oscclk",
+                                     "bus",
+                                     "usb31drd",
+                                     "usbdp_debug",
+                                     "dpgtc";
+               };
+
                pinctrl_hsi1: pinctrl@13040000 {
                        compatible = "samsung,exynos990-pinctrl";
                        reg = <0x13040000 0x1000>;
@@ -252,6 +270,15 @@
                        compatible = "samsung,exynos990-pinctrl";
                        reg = <0x15c30000 0x1000>;
                };
+
+               cmu_top: clock-controller@1a330000 {
+                       compatible = "samsung,exynos990-cmu-top";
+                       reg = <0x1a330000 0x8000>;
+                       #clock-cells = <1>;
+
+                       clocks = <&oscclk>;
+                       clock-names = "oscclk";
+               };
        };
 
        timer {