}
vu_queue_push(&g->dev.parent, cmd->vq, &cmd->elem, s);
vu_queue_notify(&g->dev.parent, cmd->vq);
- cmd->finished = true;
+ cmd->state = VG_CMD_STATE_FINISHED;
}
void
cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC;
break;
}
- if (!cmd->finished) {
+ if (cmd->state == VG_CMD_STATE_NEW) {
vg_ctrl_response_nodata(vg, cmd, cmd->error ? cmd->error :
VIRTIO_GPU_RESP_OK_NODATA);
}
}
cmd->vq = vq;
cmd->error = 0;
- cmd->finished = false;
+ cmd->state = VG_CMD_STATE_NEW;
len = iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num,
0, &cmd->cmd_hdr, sizeof(cmd->cmd_hdr));
vg_process_cmd(vg, cmd);
}
- if (!cmd->finished) {
+ if (cmd->state != VG_CMD_STATE_FINISHED) {
QTAILQ_INSERT_TAIL(&vg->fenceq, cmd, next);
vg->inflight++;
} else {
QTAILQ_HEAD(, virtio_gpu_ctrl_command) fenceq;
} VuGpu;
+enum {
+ VG_CMD_STATE_NEW,
+ VG_CMD_STATE_PENDING,
+ VG_CMD_STATE_FINISHED,
+};
+
struct virtio_gpu_ctrl_command {
VuVirtqElement elem;
VuVirtq *vq;
struct virtio_gpu_ctrl_hdr cmd_hdr;
uint32_t error;
- bool finished;
+ int state;
QTAILQ_ENTRY(virtio_gpu_ctrl_command) next;
};