kselftest/arm64: add FEAT_LSE128 to hwcap test

Add test of a 128-bit atomic instruction for FEAT_LSE128.

Signed-off-by: Joey Gouly <joey.gouly@arm.com>
Cc: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20231003124544.858804-3-joey.gouly@arm.com
[catalin.marinas@arm.com: reordered lse128_sigill() alphabetically]
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

diff --git a/tools/testing/selftests/arm64/abi/hwcap.c b/tools/testing/selftests/arm64/abi/hwcap.c
index a60f23794944dde6999194bd166ac6dadbb8517e..1189e77c815284d5a27b007b1582e883b3fa4d8f 100644 (file)
--- a/tools/testing/selftests/arm64/abi/hwcap.c
+++ b/tools/testing/selftests/arm64/abi/hwcap.c
@@ -81,6 +81,20 @@ static void lrcpc_sigill(void)
        asm volatile(".inst 0xb8bfc3e0" : : : );
 }
 
+static void lse128_sigill(void)
+{
+       u64 __attribute__ ((aligned (16))) mem[2] = { 10, 20 };
+       register u64 *memp asm ("x0") = mem;
+       register u64 val0 asm ("x1") = 5;
+       register u64 val1 asm ("x2") = 4;
+
+       /* SWPP X1, X2, [X0] */
+       asm volatile(".inst 0x19228001"
+                    : "+r" (memp), "+r" (val0), "+r" (val1)
+                    :
+                    : "cc", "memory");
+}
+
 static void mops_sigill(void)
 {
        char dst[1], src[1];
@@ -390,6 +404,13 @@ static const struct hwcap_data {
                .sigbus_fn = uscat_sigbus,
                .sigbus_reliable = true,
        },
+       {
+               .name = "LSE128",
+               .at_hwcap = AT_HWCAP2,
+               .hwcap_bit = HWCAP2_LSE128,
+               .cpuinfo = "lse128",
+               .sigill_fn = lse128_sigill,
+       },
        {
                .name = "MOPS",
                .at_hwcap = AT_HWCAP2,