int amdgpu_device_init(struct amdgpu_device *adev,
                       uint32_t flags);
-void amdgpu_device_fini(struct amdgpu_device *adev);
+void amdgpu_device_fini_hw(struct amdgpu_device *adev);
+void amdgpu_device_fini_sw(struct amdgpu_device *adev);
+
 int amdgpu_gpu_wait_for_idle(struct amdgpu_device *adev);
 
 void amdgpu_device_vram_access(struct amdgpu_device *adev, loff_t pos,
 int amdgpu_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
 void amdgpu_driver_postclose_kms(struct drm_device *dev,
                                 struct drm_file *file_priv);
+void amdgpu_driver_release_kms(struct drm_device *dev);
+
 int amdgpu_device_ip_suspend(struct amdgpu_device *adev);
 int amdgpu_device_suspend(struct drm_device *dev, bool fbcon);
 int amdgpu_device_resume(struct drm_device *dev, bool fbcon);
 
  * Tear down the driver info (all asics).
  * Called at driver shutdown.
  */
-void amdgpu_device_fini(struct amdgpu_device *adev)
+void amdgpu_device_fini_hw(struct amdgpu_device *adev)
 {
        dev_info(adev->dev, "amdgpu: finishing device.\n");
        flush_delayed_work(&adev->delayed_init_work);
        ttm_bo_lock_delayed_workqueue(&adev->mman.bdev);
        adev->shutdown = true;
 
-       kfree(adev->pci_state);
-
        /* make sure IB test finished before entering exclusive mode
         * to avoid preemption on IB test
         * */
                else
                        drm_atomic_helper_shutdown(adev_to_drm(adev));
        }
-       amdgpu_fence_driver_fini(adev);
+       amdgpu_fence_driver_fini_hw(adev);
+
        if (adev->pm_sysfs_en)
                amdgpu_pm_sysfs_fini(adev);
+       if (adev->ucode_sysfs_en)
+               amdgpu_ucode_sysfs_fini(adev);
+       sysfs_remove_files(&adev->dev->kobj, amdgpu_dev_attributes);
+
+
        amdgpu_fbdev_fini(adev);
+
+       amdgpu_irq_fini_hw(adev);
+}
+
+void amdgpu_device_fini_sw(struct amdgpu_device *adev)
+{
        amdgpu_device_ip_fini(adev);
+       amdgpu_fence_driver_fini_sw(adev);
        release_firmware(adev->firmware.gpu_info_fw);
        adev->firmware.gpu_info_fw = NULL;
        adev->accel_working = false;
        adev->rmmio = NULL;
        amdgpu_device_doorbell_fini(adev);
 
-       if (adev->ucode_sysfs_en)
-               amdgpu_ucode_sysfs_fini(adev);
-
-       sysfs_remove_files(&adev->dev->kobj, amdgpu_dev_attributes);
        if (IS_ENABLED(CONFIG_PERF_EVENTS))
                amdgpu_pmu_fini(adev);
        if (adev->mman.discovery_bin)
                amdgpu_discovery_fini(adev);
+
+       kfree(adev->pci_state);
+
 }
 
 
 
 {
        struct drm_device *dev = pci_get_drvdata(pdev);
 
-#ifdef MODULE
-       if (THIS_MODULE->state != MODULE_STATE_GOING)
-#endif
-               DRM_ERROR("Hotplug removal is not supported\n");
        drm_dev_unplug(dev);
        amdgpu_driver_unload_kms(dev);
+
        pci_disable_device(pdev);
-       pci_set_drvdata(pdev, NULL);
 }
 
 static void
        .dumb_create = amdgpu_mode_dumb_create,
        .dumb_map_offset = amdgpu_mode_dumb_mmap,
        .fops = &amdgpu_driver_kms_fops,
+       .release = &amdgpu_driver_release_kms,
 
        .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
        .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 
  *
  * Tear down the fence driver for all possible rings (all asics).
  */
-void amdgpu_fence_driver_fini(struct amdgpu_device *adev)
+void amdgpu_fence_driver_fini_hw(struct amdgpu_device *adev)
 {
        unsigned i, j;
        int r;
                                       ring->fence_drv.irq_type);
 
                del_timer_sync(&ring->fence_drv.fallback_timer);
+       }
+}
+
+void amdgpu_fence_driver_fini_sw(struct amdgpu_device *adev)
+{
+       unsigned int i, j;
+
+       for (i = 0; i < AMDGPU_MAX_RINGS; i++) {
+               struct amdgpu_ring *ring = adev->rings[i];
+
+               if (!ring || !ring->fence_drv.initialized)
+                       continue;
+
                for (j = 0; j <= ring->fence_drv.num_fences_mask; ++j)
                        dma_fence_put(ring->fence_drv.fences[j]);
                kfree(ring->fence_drv.fences);
 
 #include <drm/drm_irq.h>
 #include <drm/drm_vblank.h>
 #include <drm/amdgpu_drm.h>
+#include <drm/drm_drv.h>
 #include "amdgpu.h"
 #include "amdgpu_ih.h"
 #include "atom.h"
        return 0;
 }
 
+
+void amdgpu_irq_fini_hw(struct amdgpu_device *adev)
+{
+       if (adev->irq.installed) {
+               drm_irq_uninstall(&adev->ddev);
+               adev->irq.installed = false;
+               if (adev->irq.msi_enabled)
+                       pci_free_irq_vectors(adev->pdev);
+
+               if (!amdgpu_device_has_dc_support(adev))
+                       flush_work(&adev->hotplug_work);
+       }
+}
+
 /**
  * amdgpu_irq_fini - shut down interrupt handling
  *
  * functionality, shuts down vblank, hotplug and reset interrupt handling,
  * turns off interrupts from all sources (all ASICs).
  */
-void amdgpu_irq_fini(struct amdgpu_device *adev)
+void amdgpu_irq_fini_sw(struct amdgpu_device *adev)
 {
        unsigned i, j;
 
-       if (adev->irq.installed) {
-               drm_irq_uninstall(adev_to_drm(adev));
-               adev->irq.installed = false;
-               if (adev->irq.msi_enabled)
-                       pci_free_irq_vectors(adev->pdev);
-               if (!amdgpu_device_has_dc_support(adev))
-                       flush_work(&adev->hotplug_work);
-       }
-
        for (i = 0; i < AMDGPU_IRQ_CLIENTID_MAX; ++i) {
                if (!adev->irq.client[i].sources)
                        continue;
 
 irqreturn_t amdgpu_irq_handler(int irq, void *arg);
 
 int amdgpu_irq_init(struct amdgpu_device *adev);
-void amdgpu_irq_fini(struct amdgpu_device *adev);
+void amdgpu_irq_fini_sw(struct amdgpu_device *adev);
+void amdgpu_irq_fini_hw(struct amdgpu_device *adev);
 int amdgpu_irq_add_id(struct amdgpu_device *adev,
                      unsigned client_id, unsigned src_id,
                      struct amdgpu_irq_src *source);
 
 
 #include "amdgpu.h"
 #include <drm/amdgpu_drm.h>
+#include <drm/drm_drv.h>
 #include "amdgpu_uvd.h"
 #include "amdgpu_vce.h"
 #include "atom.h"
        }
 
        amdgpu_acpi_fini(adev);
-       amdgpu_device_fini(adev);
+       amdgpu_device_fini_hw(adev);
 }
 
 void amdgpu_register_gpu_instance(struct amdgpu_device *adev)
        pm_runtime_put_autosuspend(dev->dev);
 }
 
+
+void amdgpu_driver_release_kms(struct drm_device *dev)
+{
+       struct amdgpu_device *adev = drm_to_adev(dev);
+
+       amdgpu_device_fini_sw(adev);
+       pci_set_drvdata(adev->pdev, NULL);
+}
+
 /*
  * VBlank related functions.
  */
 
        if (!adev->ras_features || !con)
                return 0;
 
+
        /* Need disable ras on all IPs here before ip [hw/sw]fini */
        amdgpu_ras_disable_all_features(adev, 0);
        amdgpu_ras_recovery_fini(adev);
 
 };
 
 int amdgpu_fence_driver_init(struct amdgpu_device *adev);
-void amdgpu_fence_driver_fini(struct amdgpu_device *adev);
+void amdgpu_fence_driver_fini_hw(struct amdgpu_device *adev);
+void amdgpu_fence_driver_fini_sw(struct amdgpu_device *adev);
 void amdgpu_fence_driver_force_completion(struct amdgpu_ring *ring);
 
 int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring,
 
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
-       amdgpu_irq_fini(adev);
+       amdgpu_irq_fini_sw(adev);
        amdgpu_ih_ring_fini(adev, &adev->irq.ih);
        amdgpu_irq_remove_domain(adev);
 
 
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
-       amdgpu_irq_fini(adev);
+       amdgpu_irq_fini_sw(adev);
        amdgpu_ih_ring_fini(adev, &adev->irq.ih);
        amdgpu_irq_remove_domain(adev);
 
 
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
-       amdgpu_irq_fini(adev);
+       amdgpu_irq_fini_sw(adev);
        amdgpu_ih_ring_fini(adev, &adev->irq.ih);
        amdgpu_irq_remove_domain(adev);
 
 
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
-       amdgpu_irq_fini(adev);
+       amdgpu_irq_fini_sw(adev);
        amdgpu_ih_ring_fini(adev, &adev->irq.ih_soft);
        amdgpu_ih_ring_fini(adev, &adev->irq.ih2);
        amdgpu_ih_ring_fini(adev, &adev->irq.ih1);
 
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
-       amdgpu_irq_fini(adev);
+       amdgpu_irq_fini_sw(adev);
        amdgpu_ih_ring_fini(adev, &adev->irq.ih);
 
        return 0;
 
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
-       amdgpu_irq_fini(adev);
+       amdgpu_irq_fini_sw(adev);
        amdgpu_ih_ring_fini(adev, &adev->irq.ih);
        amdgpu_irq_remove_domain(adev);
 
 
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
-       amdgpu_irq_fini(adev);
+       amdgpu_irq_fini_sw(adev);
        amdgpu_ih_ring_fini(adev, &adev->irq.ih_soft);
        amdgpu_ih_ring_fini(adev, &adev->irq.ih2);
        amdgpu_ih_ring_fini(adev, &adev->irq.ih1);
 
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
-       amdgpu_irq_fini(adev);
+       amdgpu_irq_fini_sw(adev);
        amdgpu_ih_ring_fini(adev, &adev->irq.ih_soft);
        amdgpu_ih_ring_fini(adev, &adev->irq.ih2);
        amdgpu_ih_ring_fini(adev, &adev->irq.ih1);