scsi: ufs: host: mediatek: Fix PWM mode switch issue

Address a failure in switching to PWM mode by ensuring proper
configuration of power modes and adaptation settings. The changes
include checks for SLOW_MODE and adjustments to the desired working mode
and adaptation configuration based on the device's power mode and
hardware version.

Signed-off-by: Peter Wang <peter.wang@mediatek.com>
Link: https://lore.kernel.org/r/20250811131423.3444014-6-peter.wang@mediatek.com
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 2b55e77d5100f6284ad852675193b9db9eb737a3..56f6dd01c470eb6ae8b2abaad1f4cc70cbc94f90 100644 (file)
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -1321,6 +1321,10 @@ static bool ufs_mtk_pmc_via_fastauto(struct ufs_hba *hba,
            dev_req_params->gear_rx < UFS_HS_G4)
                return false;
 
+       if (dev_req_params->pwr_tx == SLOW_MODE ||
+           dev_req_params->pwr_rx == SLOW_MODE)
+               return false;
+
        return true;
 }
 
@@ -1336,6 +1340,10 @@ static int ufs_mtk_pre_pwr_change(struct ufs_hba *hba,
        host_params.hs_rx_gear = UFS_HS_G5;
        host_params.hs_tx_gear = UFS_HS_G5;
 
+       if (dev_max_params->pwr_rx == SLOW_MODE ||
+           dev_max_params->pwr_tx == SLOW_MODE)
+               host_params.desired_working_mode = UFS_PWM_MODE;
+
        ret = ufshcd_negotiate_pwr_params(&host_params, dev_max_params, dev_req_params);
        if (ret) {
                pr_info("%s: failed to determine capabilities\n",
@@ -1368,10 +1376,21 @@ static int ufs_mtk_pre_pwr_change(struct ufs_hba *hba,
                }
        }
 
-       if (host->hw_ver.major >= 3) {
+       if (dev_req_params->pwr_rx == FAST_MODE ||
+           dev_req_params->pwr_rx == FASTAUTO_MODE) {
+               if (host->hw_ver.major >= 3) {
+                       ret = ufshcd_dme_configure_adapt(hba,
+                                                  dev_req_params->gear_tx,
+                                                  PA_INITIAL_ADAPT);
+               } else {
+                       ret = ufshcd_dme_configure_adapt(hba,
+                                  dev_req_params->gear_tx,
+                                  PA_NO_ADAPT);
+               }
+       } else {
                ret = ufshcd_dme_configure_adapt(hba,
-                                          dev_req_params->gear_tx,
-                                          PA_INITIAL_ADAPT);
+                          dev_req_params->gear_tx,
+                          PA_NO_ADAPT);
        }
 
        return ret;