drm/amd/display: Add WBSCL ram coefficient for writeback

Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Roman Li <roman.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c
index f8667be570466459e32ae7c8874c885532b1a02b..80779e85e2c5cca0f273918d64afb1c82b53fc9d 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c
@@ -299,6 +299,17 @@ void dwb2_set_scaler(struct dwbc *dwbc, struct dc_dwb_params *params)
                }
        }
 
+
+       if (dwbc20->dwbc_mask->WBSCL_COEF_RAM_SEL) {
+               /* Swap double buffered coefficient set */
+               uint32_t wbscl_mode = REG_READ(WBSCL_MODE);
+               bool coef_ram_current = get_reg_field_value_ex(
+                       wbscl_mode, dwbc20->dwbc_mask->WBSCL_COEF_RAM_SEL_CURRENT,
+                       dwbc20->dwbc_shift->WBSCL_COEF_RAM_SEL_CURRENT);
+
+               REG_UPDATE(WBSCL_MODE, WBSCL_COEF_RAM_SEL, !coef_ram_current);
+       }
+
 }
 
 static const struct dwbc_funcs dcn20_dwbc_funcs = {