u32 fw_version;
 
        unsigned char peer_addr[ETH_ALEN];
+       unsigned long cap_flags;
 
        int numa_node;
        enum erdma_cc_alg cc;
 
 
 /* cap qword 0 definition */
 #define ERDMA_CMD_DEV_CAP_MAX_CQE_MASK GENMASK_ULL(47, 40)
+#define ERDMA_CMD_DEV_CAP_FLAGS_MASK GENMASK_ULL(31, 24)
 #define ERDMA_CMD_DEV_CAP_MAX_RECV_WR_MASK GENMASK_ULL(23, 16)
 #define ERDMA_CMD_DEV_CAP_MAX_MR_SIZE_MASK GENMASK_ULL(7, 0)
 
 
 #define ERDMA_NQP_PER_QBLOCK 1024
 
+enum {
+       ERDMA_DEV_CAP_FLAGS_ATOMIC = 1 << 7,
+};
+
 #define ERDMA_CMD_INFO0_FW_VER_MASK GENMASK_ULL(31, 0)
 
 /* CQE hdr */
 
        dev->attrs.max_qp = ERDMA_NQP_PER_QBLOCK * ERDMA_GET_CAP(QBLOCK, cap1);
        dev->attrs.max_mr = dev->attrs.max_qp << 1;
        dev->attrs.max_cq = dev->attrs.max_qp << 1;
+       dev->attrs.cap_flags = ERDMA_GET_CAP(FLAGS, cap0);
 
        dev->attrs.max_send_wr = ERDMA_MAX_SEND_WR;
        dev->attrs.max_ord = ERDMA_MAX_ORD;
 
        attr->max_mw = dev->attrs.max_mw;
        attr->max_fast_reg_page_list_len = ERDMA_MAX_FRMR_PA;
        attr->page_size_cap = ERDMA_PAGE_SIZE_SUPPORT;
+
+       if (dev->attrs.cap_flags & ERDMA_DEV_CAP_FLAGS_ATOMIC)
+               attr->atomic_cap = IB_ATOMIC_GLOB;
+
        attr->fw_ver = dev->attrs.fw_version;
 
        if (dev->netdev)