Use PCI configure space read to flush PCI function reset register write to avoid...

When adding PCI read following LPe16000 port PCI function reset PortControl
register write for flushing the PCI pipe, the LPe16000 PortStatus register was
used for the PCI readl(). However, it might be an issue on platforms which will
not allow MMIO reads to master abort as the PCI device was not expected to
respond to a readl() following the function reset.

commit id: 2b81f942e75abda20f753e69f7a5416930ea001f

Signed-off-by: Maxim Uvarov <maxim.uvarov@oracle.com>

diff --git a/drivers/scsi/lpfc/lpfc_init.c b/drivers/scsi/lpfc/lpfc_init.c
index 602d3e610f7dca167edf2c318e47577f6f31514a..d23344c90e2f6c035fedad486b4383f17c0eefc9 100644 (file)
--- a/drivers/scsi/lpfc/lpfc_init.c
+++ b/drivers/scsi/lpfc/lpfc_init.c
@@ -7204,6 +7204,7 @@ lpfc_pci_function_reset(struct lpfc_hba *phba)
        uint32_t rdy_chk, num_resets = 0, reset_again = 0;
        union lpfc_sli4_cfg_shdr *shdr;
        struct lpfc_register reg_data;
+       uint16_t devid;
 
        if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
        switch (if_type) {
@@ -7251,7 +7252,8 @@ lpfc_pci_function_reset(struct lpfc_hba *phba)
                        writel(reg_data.word0, phba->sli4_hba.u.if_type2.
                               CTRLregaddr);
                        /* flush */
-                       readl(phba->sli4_hba.u.if_type2.STATUSregaddr);
+                       pci_read_config_word(phba->pcidev,
+                                            PCI_DEVICE_ID, &devid);
                        /*
                         * Poll the Port Status Register and wait for RDY for
                         * up to 10 seconds.  If the port doesn't respond, treat