drm/amd/pm: add features to smu_v13_0_7

add prefetcher, socclk dpm, fclk dpm, uclk dpm to
smu_v13_0_7

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
index 335bf396423d02b665fadd7b1a6aaffd697e11eb..76dd4220d59a23bdb053272d1b14104c756f2a61 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
@@ -156,12 +156,20 @@ smu_v13_0_7_get_allowed_feature_mask(struct smu_context *smu,
 
        memset(feature_mask, 0, sizeof(uint32_t) * num);
 
-       *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFX_IMU_BIT);
+       *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_FW_DATA_READ_BIT);
 
        if (adev->pm.pp_feature & PP_SCLK_DPM_MASK) {
                *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT);
+               *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFX_IMU_BIT);
        }
 
+       if (adev->pm.pp_feature & PP_MCLK_DPM_MASK) {
+               *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_UCLK_BIT);
+               *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_FCLK_BIT);
+       }
+
+       *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT);
+
        return 0;
 }