drm/amdgpu/pm: implement the SMU_MSG_EnableGfxImu function

GC v11_0_1 asic needs to issue the EnableGfxImu message after start IMU.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Tim Huang <Tim.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
index d1bf073adf54392510b7e16b60c1885578427243..956b6ce81c846663094cc1b8d468e4c7b7323153 100644 (file)
--- a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
@@ -107,6 +107,20 @@ int amdgpu_dpm_set_powergating_by_smu(struct amdgpu_device *adev, uint32_t block
        return ret;
 }
 
+int amdgpu_dpm_set_gfx_power_up_by_imu(struct amdgpu_device *adev)
+{
+       struct smu_context *smu = adev->powerplay.pp_handle;
+       int ret = -EOPNOTSUPP;
+
+       mutex_lock(&adev->pm.mutex);
+       ret = smu_set_gfx_power_up_by_imu(smu);
+       mutex_unlock(&adev->pm.mutex);
+
+       msleep(10);
+
+       return ret;
+}
+
 int amdgpu_dpm_baco_enter(struct amdgpu_device *adev)
 {
        const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;

diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h b/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
index 3e78b3057277d4e0a2407b0c1539f81d59a5ff14..524fb09437e57a067af006a0927a57a35e16dfa5 100644 (file)
--- a/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
+++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
@@ -386,6 +386,8 @@ int amdgpu_dpm_mode1_reset(struct amdgpu_device *adev);
 int amdgpu_dpm_set_mp1_state(struct amdgpu_device *adev,
                             enum pp_mp1_state mp1_state);
 
+int amdgpu_dpm_set_gfx_power_up_by_imu(struct amdgpu_device *adev);
+
 int amdgpu_dpm_baco_exit(struct amdgpu_device *adev);
 
 int amdgpu_dpm_baco_enter(struct amdgpu_device *adev);

diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index a601024ba4de8854b1d2ed9ada98372ab4f8af21..ae595ee544dcad15a74f5fc2dd673b0c15df6257 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -134,6 +134,14 @@ int smu_get_dpm_freq_range(struct smu_context *smu,
        return ret;
 }
 
+int smu_set_gfx_power_up_by_imu(struct smu_context *smu)
+{
+       if (!smu->ppt_funcs && !smu->ppt_funcs->set_gfx_power_up_by_imu)
+               return -EOPNOTSUPP;
+
+       return smu->ppt_funcs->set_gfx_power_up_by_imu(smu);
+}
+
 static u32 smu_get_mclk(void *handle, bool low)
 {
        struct smu_context *smu = handle;
@@ -2467,7 +2475,6 @@ static int smu_set_power_profile_mode(void *handle,
        return smu_bump_power_profile_mode(smu, param, param_size);
 }
 
-
 static int smu_get_fan_control_mode(void *handle, u32 *fan_mode)
 {
        struct smu_context *smu = handle;

diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
index a6a7b6c33683eb90444016787ddfa1bada8468b5..c3d5a616e572ec7339331820bb6344a08e6d4dc4 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
@@ -697,6 +697,11 @@ struct pptable_funcs {
         */
        int (*dpm_set_jpeg_enable)(struct smu_context *smu, bool enable);
 
+       /**
+        * @set_gfx_power_up_by_imu: Enable GFX engine with IMU
+        */
+       int (*set_gfx_power_up_by_imu)(struct smu_context *smu);
+
        /**
         * @read_sensor: Read data from a sensor.
         * &sensor: Sensor to read data from.
@@ -1438,6 +1443,8 @@ int smu_get_dpm_freq_range(struct smu_context *smu, enum smu_clk_type clk_type,
 int smu_set_soft_freq_range(struct smu_context *smu, enum smu_clk_type clk_type,
                            uint32_t min, uint32_t max);
 
+int smu_set_gfx_power_up_by_imu(struct smu_context *smu);
+
 int smu_set_ac_dc(struct smu_context *smu);
 
 int smu_allow_xgmi_power_down(struct smu_context *smu, bool en);

diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
index 036fd2810ecca424bc8cf7135258be62edc68798..08270d8528d9bc8f1fa3e70fcbad8f0f379ee44c 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
@@ -292,6 +292,8 @@ int smu_v13_0_baco_enter(struct smu_context *smu);
 
 int smu_v13_0_baco_exit(struct smu_context *smu);
 
+int smu_v13_0_set_gfx_power_up_by_imu(struct smu_context *smu);
+
 int smu_v13_0_od_edit_dpm_table(struct smu_context *smu,
                                enum PP_OD_DPM_TABLE_COMMAND type,
                                long input[],

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
index 7be4f6875a7bc57466785a08dd298b790b5ebbb2..a56dddc9fb8842294c88eb0f70047890ac1fc9de 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
@@ -2297,6 +2297,16 @@ int smu_v13_0_baco_exit(struct smu_context *smu)
                                        SMU_BACO_STATE_EXIT);
 }
 
+int smu_v13_0_set_gfx_power_up_by_imu(struct smu_context *smu)
+{
+       uint16_t index;
+
+       index = smu_cmn_to_asic_specific_index(smu, CMN2ASIC_MAPPING_MSG,
+                                              SMU_MSG_EnableGfxImu);
+
+       return smu_cmn_send_msg_without_waiting(smu, index, 0);
+}
+
 int smu_v13_0_od_edit_dpm_table(struct smu_context *smu,
                                enum PP_OD_DPM_TABLE_COMMAND type,
                                long input[], uint32_t size)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c
index 5a17b51aa0f9f1e88bbe0e556721d14eb0ea438a..29fcce04a91aa39f8f0b56e082192e9d85bb74e5 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c
@@ -1030,6 +1030,7 @@ static const struct pptable_funcs smu_v13_0_4_ppt_funcs = {
        .force_clk_levels = smu_v13_0_4_force_clk_levels,
        .set_performance_level = smu_v13_0_4_set_performance_level,
        .set_fine_grain_gfx_freq_parameters = smu_v13_0_4_set_fine_grain_gfx_freq_parameters,
+       .set_gfx_power_up_by_imu = smu_v13_0_set_gfx_power_up_by_imu,
 };
 
 void smu_v13_0_4_set_ppt_funcs(struct smu_context *smu)