arm64: dts: imx8m: correct assigned clocks for FEC

CLK_ENET_TIMER assigned clocks twice, should be a typo, correct to
CLK_ENET_PHY_REF clock.

Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 9bee6f1889a4ef6ceb434ebbf87dce50697addca..5af0e63b1db13a447088c6d158dbd558e8a6c305 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -915,11 +915,12 @@
                                assigned-clocks = <&clk IMX8MM_CLK_ENET_AXI>,
                                                  <&clk IMX8MM_CLK_ENET_TIMER>,
                                                  <&clk IMX8MM_CLK_ENET_REF>,
-                                                 <&clk IMX8MM_CLK_ENET_TIMER>;
+                                                 <&clk IMX8MM_CLK_ENET_PHY_REF>;
                                assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_266M>,
                                                         <&clk IMX8MM_SYS_PLL2_100M>,
-                                                        <&clk IMX8MM_SYS_PLL2_125M>;
-                               assigned-clock-rates = <0>, <0>, <125000000>, <100000000>;
+                                                        <&clk IMX8MM_SYS_PLL2_125M>,
+                                                        <&clk IMX8MM_SYS_PLL2_50M>;
+                               assigned-clock-rates = <0>, <100000000>, <125000000>, <0>;
                                fsl,num-tx-queues = <3>;
                                fsl,num-rx-queues = <3>;
                                status = "disabled";

diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index d021aba5fb1fcc4be944900b0e5f867eac82dd67..79c389969b83969e4801f501308d225a293c49e8 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -913,11 +913,12 @@
                                assigned-clocks = <&clk IMX8MN_CLK_ENET_AXI>,
                                                  <&clk IMX8MN_CLK_ENET_TIMER>,
                                                  <&clk IMX8MN_CLK_ENET_REF>,
-                                                 <&clk IMX8MN_CLK_ENET_TIMER>;
+                                                 <&clk IMX8MN_CLK_ENET_PHY_REF>;
                                assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_266M>,
                                                         <&clk IMX8MN_SYS_PLL2_100M>,
-                                                        <&clk IMX8MN_SYS_PLL2_125M>;
-                               assigned-clock-rates = <0>, <0>, <125000000>, <100000000>;
+                                                        <&clk IMX8MN_SYS_PLL2_125M>,
+                                                        <&clk IMX8MN_SYS_PLL2_50M>;
+                               assigned-clock-rates = <0>, <100000000>, <125000000>, <0>;
                                fsl,num-tx-queues = <3>;
                                fsl,num-rx-queues = <3>;
                                status = "disabled";

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 9401e92f1c84da8b88f7d61070da24eaaf0339b1..ba32725ff28ca624539d332508ebdbffb09563a8 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -768,11 +768,12 @@
                                assigned-clocks = <&clk IMX8MP_CLK_ENET_AXI>,
                                                  <&clk IMX8MP_CLK_ENET_TIMER>,
                                                  <&clk IMX8MP_CLK_ENET_REF>,
-                                                 <&clk IMX8MP_CLK_ENET_TIMER>;
+                                                 <&clk IMX8MP_CLK_ENET_PHY_REF>;
                                assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>,
                                                         <&clk IMX8MP_SYS_PLL2_100M>,
-                                                        <&clk IMX8MP_SYS_PLL2_125M>;
-                               assigned-clock-rates = <0>, <0>, <125000000>, <100000000>;
+                                                        <&clk IMX8MP_SYS_PLL2_125M>,
+                                                        <&clk IMX8MP_SYS_PLL2_50M>;
+                               assigned-clock-rates = <0>, <100000000>, <125000000>, <0>;
                                fsl,num-tx-queues = <3>;
                                fsl,num-rx-queues = <3>;
                                status = "disabled";