clk: ux500: Support for prmcu_rate clock

The prmcu_rate clock is not gateable and has a rate which
only can be fetched.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>

diff --git a/drivers/clk/ux500/clk-prcmu.c b/drivers/clk/ux500/clk-prcmu.c
index 1d779ad121692d88ecbcb84d4d579ece7515847e..930cdfeb47ab451659843446b3f8ebdcdee01776 100644 (file)
--- a/drivers/clk/ux500/clk-prcmu.c
+++ b/drivers/clk/ux500/clk-prcmu.c
@@ -153,6 +153,11 @@ static struct clk_ops clk_prcmu_gate_ops = {
        .recalc_rate = clk_prcmu_recalc_rate,
 };
 
+static struct clk_ops clk_prcmu_rate_ops = {
+       .is_enabled = clk_prcmu_is_enabled,
+       .recalc_rate = clk_prcmu_recalc_rate,
+};
+
 static struct clk_ops clk_prcmu_opp_gate_ops = {
        .prepare = clk_prcmu_opp_prepare,
        .unprepare = clk_prcmu_opp_unprepare,
@@ -228,6 +233,15 @@ struct clk *clk_reg_prcmu_gate(const char *name,
                        &clk_prcmu_gate_ops);
 }
 
+struct clk *clk_reg_prcmu_rate(const char *name,
+                              const char *parent_name,
+                              u8 cg_sel,
+                              unsigned long flags)
+{
+       return clk_reg_prcmu(name, parent_name, cg_sel, 0, flags,
+                       &clk_prcmu_rate_ops);
+}
+
 struct clk *clk_reg_prcmu_opp_gate(const char *name,
                                   const char *parent_name,
                                   u8 cg_sel,

diff --git a/drivers/clk/ux500/clk.h b/drivers/clk/ux500/clk.h
index 32085aa98865342bfc095319a4ad44a223843c52..836d7d16751ea914616fda13878b177201fceb68 100644 (file)
--- a/drivers/clk/ux500/clk.h
+++ b/drivers/clk/ux500/clk.h
@@ -35,6 +35,11 @@ struct clk *clk_reg_prcmu_gate(const char *name,
                               u8 cg_sel,
                               unsigned long flags);
 
+struct clk *clk_reg_prcmu_rate(const char *name,
+                              const char *parent_name,
+                              u8 cg_sel,
+                              unsigned long flags);
+
 struct clk *clk_reg_prcmu_opp_gate(const char *name,
                                   const char *parent_name,
                                   u8 cg_sel,