*
*/
+#include <linux/string_helpers.h>
+
#include <drm/drm_privacy_screen_consumer.h>
#include <drm/drm_scdc_helper.h>
enable ? DP_MSA_TIMING_PAR_IGNORE_EN : 0) <= 0)
drm_dbg_kms(&i915->drm,
"Failed to %s MSA_TIMING_PAR_IGNORE in the sink\n",
- enabledisable(enable));
+ str_enable_disable(enable));
}
static void intel_dp_sink_set_fec_ready(struct intel_dp *intel_dp,
* Copyright © 2019 Intel Corporation
*/
+#include <linux/string_helpers.h>
+
#include "i915_drv.h"
#include "i915_irq.h"
#include "intel_cdclk.h"
state = intel_de_read(dev_priv, reg) & DBUF_POWER_STATE;
drm_WARN(&dev_priv->drm, enable != state,
"DBuf slice %d power %s timeout!\n",
- slice, enabledisable(enable));
+ slice, str_enable_disable(enable));
}
void gen9_dbuf_slices_update(struct drm_i915_private *dev_priv,
if (ret < 0)
drm_dbg_kms(&i915->drm,
"Failed to %s sink decompression state\n",
- enabledisable(enable));
+ str_enable_disable(enable));
}
static void
if (drm_dp_dpcd_writeb(&intel_dp->aux,
DP_PROTOCOL_CONVERTER_CONTROL_0, tmp) != 1)
drm_dbg_kms(&i915->drm, "Failed to %s protocol converter HDMI mode\n",
- enabledisable(intel_dp->has_hdmi_sink));
+ str_enable_disable(intel_dp->has_hdmi_sink));
tmp = crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR444 &&
intel_dp->dfp.ycbcr_444_to_420 ? DP_CONVERSION_TO_YCBCR420_ENABLE : 0;
DP_PROTOCOL_CONVERTER_CONTROL_1, tmp) != 1)
drm_dbg_kms(&i915->drm,
"Failed to %s protocol converter YCbCr 4:2:0 conversion mode\n",
- enabledisable(intel_dp->dfp.ycbcr_444_to_420));
+ str_enable_disable(intel_dp->dfp.ycbcr_444_to_420));
tmp = 0;
if (intel_dp->dfp.rgb_to_ycbcr) {
if (drm_dp_pcon_convert_rgb_to_ycbcr(&intel_dp->aux, tmp) < 0)
drm_dbg_kms(&i915->drm,
"Failed to %s protocol converter RGB->YCbCr conversion mode\n",
- enabledisable(tmp));
+ str_enable_disable(tmp));
}
#include <linux/circ_buf.h>
#include <linux/ktime.h>
#include <linux/time64.h>
+#include <linux/string_helpers.h>
#include <linux/timekeeping.h>
#include "i915_drv.h"
GUC_CTB_CONTROL_ENABLE : GUC_CTB_CONTROL_DISABLE);
if (unlikely(err))
CT_PROBE_ERROR(ct, "Failed to control/%s CTB (%pe)\n",
- enabledisable(enable), ERR_PTR(err));
+ str_enable_disable(enable), ERR_PTR(err));
return err;
}
* Copyright © 2021 Intel Corporation
*/
+#include <linux/string_helpers.h>
+
#include "intel_guc_rc.h"
#include "gt/intel_gt.h"
#include "i915_drv.h"
ret = guc_action_control_gucrc(guc, enable);
if (ret) {
drm_err(drm, "Failed to %s GuC RC (%pe)\n",
- enabledisable(enable), ERR_PTR(ret));
+ str_enable_disable(enable), ERR_PTR(ret));
return ret;
}
return v ? "on" : "off";
}
-static inline const char *enabledisable(bool v)
-{
- return v ? "enable" : "disable";
-}
-
static inline const char *enableddisabled(bool v)
{
return v ? "enabled" : "disabled";