drm/amdgpu/vg20:Enable UVD/VCE for Vega20

Vega20 ucode load type is set to AMDGPU_FW_LOAD_DIRECT for default.
So UVD/VCE needn't PSP IP block up. UVD/VCE for Vega20 can be enabled
at this moment.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 295bc9cd46f07b34e4454308d6acf7240dae8b08..987271b18fd1867d8e01aed273f6f643ea2069dc 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -529,10 +529,8 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
 #endif
                amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block);
                amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block);
-               if (adev->asic_type != CHIP_VEGA20) {
-                       amdgpu_device_ip_block_add(adev, &uvd_v7_0_ip_block);
-                       amdgpu_device_ip_block_add(adev, &vce_v4_0_ip_block);
-               }
+               amdgpu_device_ip_block_add(adev, &uvd_v7_0_ip_block);
+               amdgpu_device_ip_block_add(adev, &vce_v4_0_ip_block);
                break;
        case CHIP_RAVEN:
                amdgpu_device_ip_block_add(adev, &vega10_common_ip_block);