/* ALU ops on registers, bpf_add|sub|...: dst_reg += src_reg */
 
-#define BPF_ALU64_REG(OP, DST, SRC)                            \
+#define BPF_ALU64_REG_OFF(OP, DST, SRC, OFF)                   \
        ((struct bpf_insn) {                                    \
                .code  = BPF_ALU64 | BPF_OP(OP) | BPF_X,        \
                .dst_reg = DST,                                 \
                .src_reg = SRC,                                 \
-               .off   = 0,                                     \
+               .off   = OFF,                                   \
                .imm   = 0 })
 
-#define BPF_ALU32_REG(OP, DST, SRC)                            \
+#define BPF_ALU64_REG(OP, DST, SRC)                            \
+       BPF_ALU64_REG_OFF(OP, DST, SRC, 0)
+
+#define BPF_ALU32_REG_OFF(OP, DST, SRC, OFF)                   \
        ((struct bpf_insn) {                                    \
                .code  = BPF_ALU | BPF_OP(OP) | BPF_X,          \
                .dst_reg = DST,                                 \
                .src_reg = SRC,                                 \
-               .off   = 0,                                     \
+               .off   = OFF,                                   \
                .imm   = 0 })
 
+#define BPF_ALU32_REG(OP, DST, SRC)                            \
+       BPF_ALU32_REG_OFF(OP, DST, SRC, 0)
+
 /* ALU ops on immediates, bpf_add|sub|...: dst_reg += imm32 */
 
 #define BPF_ALU64_IMM(OP, DST, IMM)                            \
 
        case BPF_ALU | BPF_MOD | BPF_K:
                *to++ = BPF_ALU32_IMM(BPF_MOV, BPF_REG_AX, imm_rnd ^ from->imm);
                *to++ = BPF_ALU32_IMM(BPF_XOR, BPF_REG_AX, imm_rnd);
-               *to++ = BPF_ALU32_REG(from->code, from->dst_reg, BPF_REG_AX);
+               *to++ = BPF_ALU32_REG_OFF(from->code, from->dst_reg, BPF_REG_AX, from->off);
                break;
 
        case BPF_ALU64 | BPF_ADD | BPF_K:
        case BPF_ALU64 | BPF_MOD | BPF_K:
                *to++ = BPF_ALU64_IMM(BPF_MOV, BPF_REG_AX, imm_rnd ^ from->imm);
                *to++ = BPF_ALU64_IMM(BPF_XOR, BPF_REG_AX, imm_rnd);
-               *to++ = BPF_ALU64_REG(from->code, from->dst_reg, BPF_REG_AX);
+               *to++ = BPF_ALU64_REG_OFF(from->code, from->dst_reg, BPF_REG_AX, from->off);
                break;
 
        case BPF_JMP | BPF_JEQ  | BPF_K: