]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
ixgbe: X540 devices RX PFC frames pause traffic even if disabled
authorJohn Fastabend <john.r.fastabend@intel.com>
Wed, 21 Sep 2011 14:44:10 +0000 (14:44 +0000)
committerJoe Jin <joe.jin@oracle.com>
Thu, 17 May 2012 14:18:18 +0000 (22:18 +0800)
Receiving PFC (priority flow control) frames while the feature
is off should not pause the traffic class. On the X540 devices
the traffic class react to frames if it was previously enabled
because the field is incorrectly cleared.

(cherry picked from commit 6b8456c0199c4dd35bb7a04ff299ab925699e390)
Signed-off-by: John Fastabend <john.r.fastabend@intel.com>
Tested-by: Ross Brattain <ross.b.brattain@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Joe Jin <joe.jin@oracle.com>
drivers/net/ixgbe/ixgbe_dcb_82599.c
drivers/net/ixgbe/ixgbe_type.h

index 45fe710304556c3ef269cde49cad58dd2f9578c6..32cd97bc794d1e5f726ed99adc0f1f63b59f841e 100644 (file)
@@ -271,13 +271,23 @@ s32 ixgbe_dcb_config_pfc_82599(struct ixgbe_hw *hw, u8 pfc_en, u8 *prio_tc)
                reg |= IXGBE_MFLCN_RPFCE | IXGBE_MFLCN_DPF;
 
                if (hw->mac.type == ixgbe_mac_X540) {
-                       reg &= ~(IXGBE_MFLCN_RPFCE_MASK | 0x10);
+                       reg &= ~IXGBE_MFLCN_RPFCE_MASK;
                        reg |= pfc_en << IXGBE_MFLCN_RPFCE_SHIFT;
                }
 
                IXGBE_WRITE_REG(hw, IXGBE_MFLCN, reg);
 
        } else {
+               /* X540 devices have a RX bit that should be cleared
+                * if PFC is disabled on all TCs but PFC features is
+                * enabled.
+                */
+               if (hw->mac.type == ixgbe_mac_X540) {
+                       reg = IXGBE_READ_REG(hw, IXGBE_MFLCN);
+                       reg &= ~IXGBE_MFLCN_RPFCE_MASK;
+                       IXGBE_WRITE_REG(hw, IXGBE_MFLCN, reg);
+               }
+
                for (i = 0; i < MAX_TRAFFIC_CLASS; i++)
                        hw->mac.ops.fc_enable(hw, i);
        }
index f9c48501a7437e0b39cf34e95fb7f01deccab4f1..fbb5f1220f348c4a1172d94be328c53333d43130 100644 (file)
@@ -1848,7 +1848,7 @@ enum {
 #define IXGBE_MFLCN_DPF         0x00000002 /* Discard Pause Frame */
 #define IXGBE_MFLCN_RPFCE       0x00000004 /* Receive Priority FC Enable */
 #define IXGBE_MFLCN_RFCE        0x00000008 /* Receive FC Enable */
-#define IXGBE_MFLCN_RPFCE_MASK 0x00000FE0 /* Receive FC Mask */
+#define IXGBE_MFLCN_RPFCE_MASK 0x00000FF0 /* Receive FC Mask */
 
 #define IXGBE_MFLCN_RPFCE_SHIFT                 4