can: flexcan: rename struct flexcan_regs::crl2 -> ctrl2

This is done to mach the abbreviationin of the register in the datasheets.

Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>

diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index eb3ebfb4744218361ae0a7ab9b5453b230b35d1c..69333416d66132737558b7f274715995f8f388e6 100644 (file)
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -93,13 +93,13 @@
        (FLEXCAN_CTRL_ERR_BUS | FLEXCAN_CTRL_ERR_STATE)
 
 /* FLEXCAN control register 2 (CTRL2) bits */
-#define FLEXCAN_CRL2_ECRWRE            BIT(29)
-#define FLEXCAN_CRL2_WRMFRZ            BIT(28)
-#define FLEXCAN_CRL2_RFFN(x)           (((x) & 0x0f) << 24)
-#define FLEXCAN_CRL2_TASD(x)           (((x) & 0x1f) << 19)
-#define FLEXCAN_CRL2_MRP               BIT(18)
-#define FLEXCAN_CRL2_RRS               BIT(17)
-#define FLEXCAN_CRL2_EACEN             BIT(16)
+#define FLEXCAN_CTRL2_ECRWRE           BIT(29)
+#define FLEXCAN_CTRL2_WRMFRZ           BIT(28)
+#define FLEXCAN_CTRL2_RFFN(x)          (((x) & 0x0f) << 24)
+#define FLEXCAN_CTRL2_TASD(x)          (((x) & 0x1f) << 19)
+#define FLEXCAN_CTRL2_MRP              BIT(18)
+#define FLEXCAN_CTRL2_RRS              BIT(17)
+#define FLEXCAN_CTRL2_EACEN            BIT(16)
 
 /* FLEXCAN memory error control register (MECR) bits */
 #define FLEXCAN_MECR_ECRWRDIS          BIT(31)
@@ -221,7 +221,7 @@ struct flexcan_regs {
        u32 imask1;             /* 0x28 */
        u32 iflag2;             /* 0x2c */
        u32 iflag1;             /* 0x30 */
-       u32 crl2;               /* 0x34 */
+       u32 ctrl2;              /* 0x34 */
        u32 esr2;               /* 0x38 */
        u32 imeur;              /* 0x3c */
        u32 lrfr;               /* 0x40 */
@@ -825,7 +825,7 @@ static int flexcan_chip_start(struct net_device *dev)
 {
        struct flexcan_priv *priv = netdev_priv(dev);
        struct flexcan_regs __iomem *regs = priv->base;
-       u32 reg_mcr, reg_ctrl, reg_crl2, reg_mecr;
+       u32 reg_mcr, reg_ctrl, reg_ctrl2, reg_mecr;
        int err, i;
 
        /* enable module */
@@ -928,9 +928,9 @@ static int flexcan_chip_start(struct net_device *dev)
                 * and Correction of Memory Errors" to write to
                 * MECR register
                 */
-               reg_crl2 = flexcan_read(&regs->crl2);
-               reg_crl2 |= FLEXCAN_CRL2_ECRWRE;
-               flexcan_write(reg_crl2, &regs->crl2);
+               reg_ctrl2 = flexcan_read(&regs->ctrl2);
+               reg_ctrl2 |= FLEXCAN_CTRL2_ECRWRE;
+               flexcan_write(reg_ctrl2, &regs->ctrl2);
 
                reg_mecr = flexcan_read(&regs->mecr);
                reg_mecr &= ~FLEXCAN_MECR_ECRWRDIS;