return 0;
 }
 
-static int intel_crtc_compute_config(struct intel_crtc *crtc,
-                                    struct intel_crtc_state *crtc_state)
+static int intel_crtc_compute_pipe_mode(struct intel_crtc_state *crtc_state)
 {
+       struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
        struct drm_i915_private *i915 = to_i915(crtc->base.dev);
        struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode;
        int clock_limit = i915->max_dotclk_freq;
-       int ret;
-
-       ret = intel_crtc_compute_pipe_src(crtc_state);
-       if (ret)
-               return ret;
 
        drm_mode_copy(pipe_mode, &crtc_state->hw.adjusted_mode);
 
 
        if (pipe_mode->crtc_clock > clock_limit) {
                drm_dbg_kms(&i915->drm,
-                           "requested pixel clock (%d kHz) too high (max: %d kHz, double wide: %s)\n",
+                           "[CRTC:%d:%s] requested pixel clock (%d kHz) too high (max: %d kHz, double wide: %s)\n",
+                           crtc->base.base.id, crtc->base.name,
                            pipe_mode->crtc_clock, clock_limit,
                            yesno(crtc_state->double_wide));
                return -EINVAL;
        }
 
+       return 0;
+}
+
+static int intel_crtc_compute_config(struct intel_crtc *crtc,
+                                    struct intel_crtc_state *crtc_state)
+{
+       int ret;
+
+       ret = intel_crtc_compute_pipe_src(crtc_state);
+       if (ret)
+               return ret;
+
+       ret = intel_crtc_compute_pipe_mode(crtc_state);
+       if (ret)
+               return ret;
+
        intel_crtc_compute_pixel_rate(crtc_state);
 
        if (crtc_state->has_pch_encoder)