]> www.infradead.org Git - users/hch/misc.git/commitdiff
drm/amdgpu: Move xgmi definitions to xgmi header
authorLijo Lazar <lijo.lazar@amd.com>
Thu, 6 Feb 2025 10:46:43 +0000 (16:16 +0530)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 27 Feb 2025 21:50:04 +0000 (16:50 -0500)
Move definitions related to xgmi to amdgpu_xgmi header

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h

index 459a30fe239f7ff12bfdb5c834122626bacf8c34..bd7fc123b8f96977502ed1d906374ddd8e83a62c 100644 (file)
@@ -29,6 +29,7 @@
 #include <linux/types.h>
 
 #include "amdgpu_irq.h"
+#include "amdgpu_xgmi.h"
 #include "amdgpu_ras.h"
 
 /* VA hole for 48bit addresses on Vega10 */
@@ -174,28 +175,6 @@ struct amdgpu_gmc_funcs {
        bool (*need_reset_on_init)(struct amdgpu_device *adev);
 };
 
-struct amdgpu_xgmi_ras {
-       struct amdgpu_ras_block_object ras_block;
-};
-
-struct amdgpu_xgmi {
-       /* from psp */
-       u64 node_id;
-       u64 hive_id;
-       /* fixed per family */
-       u64 node_segment_size;
-       /* physical node (0-3) */
-       unsigned physical_node_id;
-       /* number of nodes (0-4) */
-       unsigned num_physical_nodes;
-       /* gpu list in the same hive */
-       struct list_head head;
-       bool supported;
-       struct ras_common_if *ras_if;
-       bool connected_to_cpu;
-       struct amdgpu_xgmi_ras *ras;
-};
-
 struct amdgpu_mem_partition_info {
        union {
                struct {
index c313c2cf69697685aa9b7eaade6f685fc65cfc55..59e44d20124fd78d24319dfed78213a09eb69206 100644 (file)
@@ -1714,3 +1714,11 @@ int amdgpu_xgmi_request_nps_change(struct amdgpu_device *adev,
 
        return r;
 }
+
+bool amdgpu_xgmi_same_hive(struct amdgpu_device *adev,
+                          struct amdgpu_device *bo_adev)
+{
+       return (amdgpu_use_xgmi_p2p && adev != bo_adev &&
+               adev->gmc.xgmi.hive_id &&
+               adev->gmc.xgmi.hive_id == bo_adev->gmc.xgmi.hive_id);
+}
index 924da0bec50967b43b0bfd87dbd96a5dc71eae93..1d4e822652a1885ae6d958daac4820b5ff16d2a7 100644 (file)
@@ -23,7 +23,6 @@
 #define __AMDGPU_XGMI_H__
 
 #include <drm/task_barrier.h>
-#include "amdgpu_psp.h"
 #include "amdgpu_ras.h"
 
 struct amdgpu_hive_info {
@@ -71,7 +70,29 @@ enum amdgpu_xgmi_bw_unit {
        AMDGPU_XGMI_BW_UNIT_MBYTES
 };
 
-extern struct amdgpu_xgmi_ras  xgmi_ras;
+struct amdgpu_xgmi_ras {
+       struct amdgpu_ras_block_object ras_block;
+};
+extern struct amdgpu_xgmi_ras xgmi_ras;
+
+struct amdgpu_xgmi {
+       /* from psp */
+       u64 node_id;
+       u64 hive_id;
+       /* fixed per family */
+       u64 node_segment_size;
+       /* physical node (0-3) */
+       unsigned physical_node_id;
+       /* number of nodes (0-4) */
+       unsigned num_physical_nodes;
+       /* gpu list in the same hive */
+       struct list_head head;
+       bool supported;
+       struct ras_common_if *ras_if;
+       bool connected_to_cpu;
+       struct amdgpu_xgmi_ras *ras;
+};
+
 struct amdgpu_hive_info *amdgpu_get_xgmi_hive(struct amdgpu_device *adev);
 void amdgpu_put_xgmi_hive(struct amdgpu_hive_info *hive);
 int amdgpu_xgmi_update_topology(struct amdgpu_hive_info *hive, struct amdgpu_device *adev);
@@ -86,14 +107,8 @@ bool amdgpu_xgmi_get_is_sharing_enabled(struct amdgpu_device *adev,
                                        struct amdgpu_device *peer_adev);
 uint64_t amdgpu_xgmi_get_relative_phy_addr(struct amdgpu_device *adev,
                                           uint64_t addr);
-static inline bool amdgpu_xgmi_same_hive(struct amdgpu_device *adev,
-               struct amdgpu_device *bo_adev)
-{
-       return (amdgpu_use_xgmi_p2p &&
-               adev != bo_adev &&
-               adev->gmc.xgmi.hive_id &&
-               adev->gmc.xgmi.hive_id == bo_adev->gmc.xgmi.hive_id);
-}
+bool amdgpu_xgmi_same_hive(struct amdgpu_device *adev,
+                          struct amdgpu_device *bo_adev);
 int amdgpu_xgmi_ras_sw_init(struct amdgpu_device *adev);
 int amdgpu_xgmi_reset_on_init(struct amdgpu_device *adev);