drm/amdgpu: Reinit FW shared flags on VCN v5.0.1

After a full device reset, shared memory region will clear out and it's
not possible to reliably save the region in case of RAS errors.
Reinitialize the flags if required.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
index bb2519a95312dd4a8c0c35adf07b9b021eeff693..581d8629b9d956e4fe8555a90e4661626299c907 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
@@ -76,6 +76,22 @@ static int vcn_v5_0_1_early_init(struct amdgpu_ip_block *ip_block)
        return 0;
 }
 
+static void vcn_v5_0_1_fw_shared_init(struct amdgpu_device *adev, int inst_idx)
+{
+       struct amdgpu_vcn5_fw_shared *fw_shared;
+
+       fw_shared = adev->vcn.inst[inst_idx].fw_shared.cpu_addr;
+
+       if (fw_shared->sq.is_enabled)
+               return;
+       fw_shared->present_flag_0 =
+               cpu_to_le32(AMDGPU_FW_SHARED_FLAG_0_UNIFIED_QUEUE);
+       fw_shared->sq.is_enabled = 1;
+
+       if (amdgpu_vcnfw_log)
+               amdgpu_vcn_fwlog_init(&adev->vcn.inst[inst_idx]);
+}
+
 /**
  * vcn_v5_0_1_sw_init - sw init for VCN block
  *
@@ -96,8 +112,6 @@ static int vcn_v5_0_1_sw_init(struct amdgpu_ip_block *ip_block)
                return r;
 
        for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
-               volatile struct amdgpu_vcn5_fw_shared *fw_shared;
-
                vcn_inst = GET_INST(VCN, i);
 
                r = amdgpu_vcn_sw_init(adev, i);
@@ -122,12 +136,7 @@ static int vcn_v5_0_1_sw_init(struct amdgpu_ip_block *ip_block)
                if (r)
                        return r;
 
-               fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr;
-               fw_shared->present_flag_0 = cpu_to_le32(AMDGPU_FW_SHARED_FLAG_0_UNIFIED_QUEUE);
-               fw_shared->sq.is_enabled = true;
-
-               if (amdgpu_vcnfw_log)
-                       amdgpu_vcn_fwlog_init(&adev->vcn.inst[i]);
+               vcn_v5_0_1_fw_shared_init(adev, i);
        }
 
        /* TODO: Add queue reset mask when FW fully supports it */
@@ -207,6 +216,9 @@ static int vcn_v5_0_1_hw_init(struct amdgpu_ip_block *ip_block)
                                 9 * vcn_inst),
                                adev->vcn.inst[i].aid_id);
 
+               /* Re-init fw_shared, if required */
+               vcn_v5_0_1_fw_shared_init(adev, i);
+
                r = amdgpu_ring_test_helper(ring);
                if (r)
                        return r;