return spi_mem_exec_op(nor->spimem, op);
 }
 
+static int spi_nor_controller_ops_read_reg(struct spi_nor *nor, u8 opcode,
+                                          u8 *buf, size_t len)
+{
+       return nor->controller_ops->read_reg(nor, opcode, buf, len);
+}
+
+static int spi_nor_controller_ops_write_reg(struct spi_nor *nor, u8 opcode,
+                                           const u8 *buf, size_t len)
+{
+       return nor->controller_ops->write_reg(nor, opcode, buf, len);
+}
+
+static int spi_nor_controller_ops_erase(struct spi_nor *nor, loff_t offs)
+{
+       return nor->controller_ops->erase(nor, offs);
+}
+
 /**
  * spi_nor_spimem_read_data() - read data from flash's memory region via
  *                              spi-mem
 
                ret = spi_mem_exec_op(nor->spimem, &op);
        } else {
-               ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WREN,
-                                                    NULL, 0);
+               ret = spi_nor_controller_ops_write_reg(nor, SPINOR_OP_WREN,
+                                                      NULL, 0);
        }
 
        if (ret)
 
                ret = spi_mem_exec_op(nor->spimem, &op);
        } else {
-               ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WRDI,
-                                                    NULL, 0);
+               ret = spi_nor_controller_ops_write_reg(nor, SPINOR_OP_WRDI,
+                                                      NULL, 0);
        }
 
        if (ret)
 
                ret = spi_mem_exec_op(nor->spimem, &op);
        } else {
-               ret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDSR,
-                                                   sr, 1);
+               ret = spi_nor_controller_ops_read_reg(nor, SPINOR_OP_RDSR, sr,
+                                                     1);
        }
 
        if (ret)
 
                ret = spi_mem_exec_op(nor->spimem, &op);
        } else {
-               ret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDFSR,
-                                                   fsr, 1);
+               ret = spi_nor_controller_ops_read_reg(nor, SPINOR_OP_RDFSR, fsr,
+                                                     1);
        }
 
        if (ret)
 
                ret = spi_mem_exec_op(nor->spimem, &op);
        } else {
-               ret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDCR, cr, 1);
+               ret = spi_nor_controller_ops_read_reg(nor, SPINOR_OP_RDCR, cr,
+                                                     1);
        }
 
        if (ret)
 
                ret = spi_mem_exec_op(nor->spimem, &op);
        } else {
-               ret = nor->controller_ops->write_reg(nor,
-                                                    enable ? SPINOR_OP_EN4B :
-                                                             SPINOR_OP_EX4B,
-                                                    NULL, 0);
+               ret = spi_nor_controller_ops_write_reg(nor,
+                                                      enable ? SPINOR_OP_EN4B :
+                                                               SPINOR_OP_EX4B,
+                                                      NULL, 0);
        }
 
        if (ret)
 
                ret = spi_mem_exec_op(nor->spimem, &op);
        } else {
-               ret = nor->controller_ops->write_reg(nor, SPINOR_OP_BRWR,
-                                                    nor->bouncebuf, 1);
+               ret = spi_nor_controller_ops_write_reg(nor, SPINOR_OP_BRWR,
+                                                      nor->bouncebuf, 1);
        }
 
        if (ret)
 
                ret = spi_mem_exec_op(nor->spimem, &op);
        } else {
-               ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WREAR,
-                                                    nor->bouncebuf, 1);
+               ret = spi_nor_controller_ops_write_reg(nor, SPINOR_OP_WREAR,
+                                                      nor->bouncebuf, 1);
        }
 
        if (ret)
 
                ret = spi_mem_exec_op(nor->spimem, &op);
        } else {
-               ret = nor->controller_ops->read_reg(nor, SPINOR_OP_XRDSR,
-                                                   sr, 1);
+               ret = spi_nor_controller_ops_read_reg(nor, SPINOR_OP_XRDSR, sr,
+                                                     1);
        }
 
        if (ret)
 
                ret = spi_mem_exec_op(nor->spimem, &op);
        } else {
-               ret = nor->controller_ops->write_reg(nor, SPINOR_OP_CLSR,
-                                                    NULL, 0);
+               ret = spi_nor_controller_ops_write_reg(nor, SPINOR_OP_CLSR,
+                                                      NULL, 0);
        }
 
        if (ret)
 
                ret = spi_mem_exec_op(nor->spimem, &op);
        } else {
-               ret = nor->controller_ops->write_reg(nor, SPINOR_OP_CLFSR,
-                                                    NULL, 0);
+               ret = spi_nor_controller_ops_write_reg(nor, SPINOR_OP_CLFSR,
+                                                      NULL, 0);
        }
 
        if (ret)
 
                ret = spi_mem_exec_op(nor->spimem, &op);
        } else {
-               ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WRSR,
-                                                    sr, len);
+               ret = spi_nor_controller_ops_write_reg(nor, SPINOR_OP_WRSR, sr,
+                                                      len);
        }
 
        if (ret) {
 
                ret = spi_mem_exec_op(nor->spimem, &op);
        } else {
-               ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WRSR2,
-                                                    sr2, 1);
+               ret = spi_nor_controller_ops_write_reg(nor, SPINOR_OP_WRSR2,
+                                                      sr2, 1);
        }
 
        if (ret) {
 
                ret = spi_mem_exec_op(nor->spimem, &op);
        } else {
-               ret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDSR2,
-                                                   sr2, 1);
+               ret = spi_nor_controller_ops_read_reg(nor, SPINOR_OP_RDSR2, sr2,
+                                                     1);
        }
 
        if (ret)
 
                ret = spi_mem_exec_op(nor->spimem, &op);
        } else {
-               ret = nor->controller_ops->write_reg(nor, SPINOR_OP_CHIP_ERASE,
-                                                    NULL, 0);
+               ret = spi_nor_controller_ops_write_reg(nor,
+                                                      SPINOR_OP_CHIP_ERASE,
+                                                      NULL, 0);
        }
 
        if (ret)
 
                return spi_mem_exec_op(nor->spimem, &op);
        } else if (nor->controller_ops->erase) {
-               return nor->controller_ops->erase(nor, addr);
+               return spi_nor_controller_ops_erase(nor, addr);
        }
 
        /*
                addr >>= 8;
        }
 
-       return nor->controller_ops->write_reg(nor, nor->erase_opcode,
-                                             nor->bouncebuf, nor->addr_width);
+       return spi_nor_controller_ops_write_reg(nor, nor->erase_opcode,
+                                               nor->bouncebuf, nor->addr_width);
 }
 
 /**