return format >= SURFACE_PIXEL_FORMAT_VIDEO_BEGIN || format == SURFACE_PIXEL_FORMAT_GRPH_RGBE_ALPHA;
 }
 
-static int dcn31_populate_dml_pipes_from_context(
+int dcn31_populate_dml_pipes_from_context(
        struct dc *dc, struct dc_state *context,
        display_e2e_pipe_params_st *pipes,
        bool fast_validate)
        .get_dcc_compression_cap = dcn20_get_dcc_compression_cap
 };
 
-static void dcn31_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params)
+void dcn31_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params)
 {
        struct clk_limit_table *clk_table = &bw_params->clk_table;
        struct _vcs_dpi_voltage_scaling_st clock_limits[DC__VOLTAGE_STATES];
 
                display_e2e_pipe_params_st *pipes,
                int pipe_cnt,
                int vlevel);
+int dcn31_populate_dml_pipes_from_context(
+       struct dc *dc, struct dc_state *context,
+       display_e2e_pipe_params_st *pipes,
+       bool fast_validate);
+void dcn31_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params);
 void dcn31_update_soc_for_wm_a(struct dc *dc, struct dc_state *context);
 
 struct resource_pool *dcn31_create_resource_pool(