arm64: dts: st: Add ospi port1 pinctrl entries in stm32mp25-pinctrl.dtsi

Add pinctrl entry related to OSPI's port1 in stm32mp25-pinctrl.dtsi

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Link: https://lore.kernel.org/r/20250512-upstream_omm_ospi_dts-v10-2-fca0fbe6d10a@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

diff --git a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi
index 8fdd5f020425d53eefa724de9c23ec0ca211ab7f..aba90d555f4ee5749f1873206f11dfac46b7817f 100644 (file)
--- a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi
@@ -82,6 +82,57 @@
                };
        };
 
+       ospi_port1_clk_pins_a: ospi-port1-clk-0 {
+               pins {
+                       pinmux = <STM32_PINMUX('D', 0, AF10)>; /* OSPI1_CLK */
+                       bias-disable;
+                       drive-push-pull;
+                       slew-rate = <2>;
+               };
+       };
+
+       ospi_port1_clk_sleep_pins_a: ospi-port1-clk-sleep-0 {
+               pins {
+                       pinmux = <STM32_PINMUX('D', 0, ANALOG)>; /* OSPI1_CLK */
+               };
+       };
+
+       ospi_port1_cs0_pins_a: ospi-port1-cs0-0 {
+               pins {
+                       pinmux = <STM32_PINMUX('D', 3, AF10)>; /* OSPI_NCS0 */
+                       bias-pull-up;
+                       drive-push-pull;
+                       slew-rate = <0>;
+               };
+       };
+
+       ospi_port1_cs0_sleep_pins_a: ospi-port1-cs0-sleep-0 {
+               pins {
+                       pinmux = <STM32_PINMUX('D', 3, ANALOG)>; /* OSPI_NCS0 */
+               };
+       };
+
+       ospi_port1_io03_pins_a: ospi-port1-io03-0 {
+               pins {
+                       pinmux = <STM32_PINMUX('D', 4, AF10)>, /* OSPI_IO0 */
+                                <STM32_PINMUX('D', 5, AF10)>, /* OSPI_IO1 */
+                                <STM32_PINMUX('D', 6, AF10)>, /* OSPI_IO2 */
+                                <STM32_PINMUX('D', 7, AF10)>; /* OSPI_IO3 */
+                       bias-disable;
+                       drive-push-pull;
+                       slew-rate = <0>;
+               };
+       };
+
+       ospi_port1_io03_sleep_pins_a: ospi-port1-io03-sleep-0 {
+               pins {
+                       pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* OSPI_IO0 */
+                                <STM32_PINMUX('D', 5, ANALOG)>, /* OSPI_IO1 */
+                                <STM32_PINMUX('D', 6, ANALOG)>, /* OSPI_IO2 */
+                                <STM32_PINMUX('D', 7, ANALOG)>; /* OSPI_IO3 */
+               };
+       };
+
        sdmmc1_b4_pins_a: sdmmc1-b4-0 {
                pins1 {
                        pinmux = <STM32_PINMUX('E', 4, AF10)>, /* SDMMC1_D0 */