drm/i915/tgl: Limit ourselves to just rcs0

More pruning away of features until we have a stable system and a basis
for debugging what's missing.

v2: Fixup vdbox/vebox fusing

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190913145556.23912-1-chris@chris-wilson.co.uk

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 9236fccb3a83224cdaf8d0fd06a8a6de9ec56c21..ee9a7959204cc7759d01fa932dea174bde9c8c38 100644 (file)
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -799,6 +799,7 @@ static const struct intel_device_info intel_tigerlake_12_info = {
                BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
        .has_rc6 = false, /* XXX disabled for debugging */
        .has_logical_ring_preemption = false, /* XXX disabled for debugging */
+       .engine_mask = BIT(RCS0), /* XXX reduced for debugging */
 };
 
 #undef GEN

diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 50b05a5de53b00b2be192ec23cf6fbba2665d146..727089dcd280ad8206c0d214b861ae49b7dc368b 100644 (file)
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -1004,8 +1004,10 @@ void intel_device_info_init_mmio(struct drm_i915_private *dev_priv)
                      GEN11_GT_VEBOX_DISABLE_SHIFT;
 
        for (i = 0; i < I915_MAX_VCS; i++) {
-               if (!HAS_ENGINE(dev_priv, _VCS(i)))
+               if (!HAS_ENGINE(dev_priv, _VCS(i))) {
+                       vdbox_mask &= ~BIT(i);
                        continue;
+               }
 
                if (!(BIT(i) & vdbox_mask)) {
                        info->engine_mask &= ~BIT(_VCS(i));
@@ -1026,8 +1028,10 @@ void intel_device_info_init_mmio(struct drm_i915_private *dev_priv)
        GEM_BUG_ON(vdbox_mask != VDBOX_MASK(dev_priv));
 
        for (i = 0; i < I915_MAX_VECS; i++) {
-               if (!HAS_ENGINE(dev_priv, _VECS(i)))
+               if (!HAS_ENGINE(dev_priv, _VECS(i))) {
+                       vebox_mask &= ~BIT(i);
                        continue;
+               }
 
                if (!(BIT(i) & vebox_mask)) {
                        info->engine_mask &= ~BIT(_VECS(i));