]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
i40e: fix write-back-on-itr to work with legacy itr
authorAnjali Singhai Jain <anjali.singhai@intel.com>
Wed, 23 Dec 2015 20:05:47 +0000 (12:05 -0800)
committerChuck Anderson <chuck.anderson@oracle.com>
Thu, 10 Mar 2016 16:37:02 +0000 (08:37 -0800)
Orabug: 22342532

We were not doing write-back on interrupt throttle for Legacy case in X722.
This patch fixes that, so we do WB_ON_ITR for Legacy as well. Plus the issue
that we should still be setting NO_ITR if we are touching the DYN_CTLN register
since we do not want to change ITR setting here.

Change-ID: I5db8491ee1544118a389db839cecc93e1bbc480e
Signed-off-by: Anjali Singhai Jain <anjali.singhai@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
(cherry picked from commit a3d772a3925d85721ad8518db14603fb1cd99295)
Signed-off-by: Brian Maly <brian.maly@oracle.com>
drivers/net/ethernet/intel/i40e/i40e_txrx.c
drivers/net/ethernet/intel/i40evf/i40e_txrx.c

index 1a3ff3791bb0c133e1dd127ce5c0125fb4af2470..1db298ea1f38853eb4dadb968e25fd1fd1fceb2b 100644 (file)
@@ -789,12 +789,20 @@ void i40e_force_wb(struct i40e_vsi *vsi, struct i40e_q_vector *q_vector)
                if (q_vector->arm_wb_state)
                        return;
 
-               val = I40E_PFINT_DYN_CTLN_WB_ON_ITR_MASK;
+               if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
+                       val = I40E_PFINT_DYN_CTLN_WB_ON_ITR_MASK |
+                             I40E_PFINT_DYN_CTLN_ITR_INDX_MASK; /* set noitr */
+
+                       wr32(&vsi->back->hw,
+                            I40E_PFINT_DYN_CTLN(q_vector->v_idx +
+                                                vsi->base_vector - 1),
+                            val);
+               } else {
+                       val = I40E_PFINT_DYN_CTL0_WB_ON_ITR_MASK |
+                             I40E_PFINT_DYN_CTL0_ITR_INDX_MASK; /* set noitr */
 
-               wr32(&vsi->back->hw,
-                    I40E_PFINT_DYN_CTLN(q_vector->v_idx +
-                                        vsi->base_vector - 1),
-                    val);
+                       wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0, val);
+               }
                q_vector->arm_wb_state = true;
        } else if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
                u32 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
index 36375328982aeabb87bef240670c35cccdfc389b..1bab9c8cb380426fcee3b2a46311236255b5e75c 100644 (file)
@@ -307,7 +307,8 @@ static void i40evf_force_wb(struct i40e_vsi *vsi, struct i40e_q_vector *q_vector
                if (q_vector->arm_wb_state)
                        return;
 
-               val = I40E_VFINT_DYN_CTLN1_WB_ON_ITR_MASK;
+               val = I40E_VFINT_DYN_CTLN1_WB_ON_ITR_MASK |
+                     I40E_VFINT_DYN_CTLN1_ITR_INDX_MASK; /* set noitr */
 
                wr32(&vsi->back->hw,
                     I40E_VFINT_DYN_CTLN1(q_vector->v_idx +