drm/amdkfd: Expose function mmhub_v9_4_setup_vm_pt_regs() for kfd to use

Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.h b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.h
index 5c8deac65580603ac69f516efb17162efe75bfab..971c0840358f51dac88b08ee36c7c5f8c8d656e5 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.h
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.h
@@ -37,4 +37,11 @@
 extern const struct amd_ip_funcs gmc_v9_0_ip_funcs;
 extern const struct amdgpu_ip_block_version gmc_v9_0_ip_block;
 
+/* amdgpu_amdkfd*.c */
+void gfxhub_v1_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid,
+                               uint64_t value);
+void mmhub_v1_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid,
+                               uint64_t value);
+void mmhub_v9_4_setup_vm_pt_regs(struct amdgpu_device *adev, int hubid,
+                               uint32_t vmid, uint64_t value);
 #endif

diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
index aa9b43b6ba6be7b4dd190bf08627697b06012309..7f79fa4b6ad1031a43d6cd3525e94e1990e1d386 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
@@ -46,18 +46,23 @@ u64 mmhub_v9_4_get_fb_location(struct amdgpu_device *adev)
        return base;
 }
 
-static void mmhub_v9_4_init_gart_pt_regs(struct amdgpu_device *adev, int hubid)
+void mmhub_v9_4_setup_vm_pt_regs(struct amdgpu_device *adev, int hubid,
+                               uint32_t vmid, uint64_t value)
 {
-       uint64_t value = amdgpu_gmc_pd_addr(adev->gart.bo);
+       /* two registers distance between mmVML2VC0_VM_CONTEXT0_* to
+        * mmVML2VC0_VM_CONTEXT1_*
+        */
+       int dist = mmVML2VC0_VM_CONTEXT1_PAGE_TABLE_BASE_ADDR_LO32
+                       - mmVML2VC0_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32;
 
        WREG32_SOC15_OFFSET(MMHUB, 0,
                            mmVML2VC0_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32,
-                           hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
+                           dist * vmid + hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
                            lower_32_bits(value));
 
        WREG32_SOC15_OFFSET(MMHUB, 0,
                            mmVML2VC0_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32,
-                           hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
+                           dist * vmid + hubid * MMHUB_INSTANCE_REGISTER_OFFSET,
                            upper_32_bits(value));
 
 }
@@ -65,7 +70,9 @@ static void mmhub_v9_4_init_gart_pt_regs(struct amdgpu_device *adev, int hubid)
 static void mmhub_v9_4_init_gart_aperture_regs(struct amdgpu_device *adev,
                                               int hubid)
 {
-       mmhub_v9_4_init_gart_pt_regs(adev, hubid);
+       uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo);
+
+       mmhub_v9_4_setup_vm_pt_regs(adev, hubid, 0, pt_base);
 
        WREG32_SOC15_OFFSET(MMHUB, 0,
                            mmVML2VC0_VM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,