]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
net/mlx5e: Use bitmap field for profile features
authorTariq Toukan <tariqt@nvidia.com>
Sun, 5 Dec 2021 10:31:47 +0000 (12:31 +0200)
committerSaeed Mahameed <saeedm@nvidia.com>
Wed, 22 Dec 2021 03:08:56 +0000 (19:08 -0800)
Use a features bitmap field in mlx5e_profile to declare profile support
state of the different features.  Let it replace the existing
rx_ptp_support boolean. It will be extended to cover more features in a
downstream patch.

Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
drivers/net/ethernet/mellanox/mlx5/core/en.h
drivers/net/ethernet/mellanox/mlx5/core/en/ptp.c
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
drivers/net/ethernet/mellanox/mlx5/core/en_rep.c
drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c
drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib_vlan.c

index e77c4159713f6bc3ce9fcd9dd47749fdddd4f040..a8fa7f1e5ce5d09233b0251616bfdccb834e842a 100644 (file)
@@ -956,6 +956,10 @@ struct mlx5e_rx_handlers {
 
 extern const struct mlx5e_rx_handlers mlx5e_rx_handlers_nic;
 
+enum mlx5e_profile_feature {
+       MLX5E_PROFILE_FEATURE_PTP_RX,
+};
+
 struct mlx5e_profile {
        int     (*init)(struct mlx5_core_dev *mdev,
                        struct net_device *netdev);
@@ -974,9 +978,12 @@ struct mlx5e_profile {
        const struct mlx5e_rx_handlers *rx_handlers;
        int     max_tc;
        u8      rq_groups;
-       bool    rx_ptp_support;
+       u32     features;
 };
 
+#define mlx5e_profile_feature_cap(profile, feature)    \
+       ((profile)->features & (MLX5E_PROFILE_FEATURE_## feature))
+
 void mlx5e_build_ptys2ethtool_map(void);
 
 bool mlx5e_check_fragmented_striding_rq_cap(struct mlx5_core_dev *mdev);
index 18d542b1c5cbd4ed482fcff9cae01272f21b9ed9..82baafd3c00c58235f96462bfc8786fca4e215c5 100644 (file)
@@ -768,7 +768,7 @@ int mlx5e_ptp_alloc_rx_fs(struct mlx5e_priv *priv)
 {
        struct mlx5e_ptp_fs *ptp_fs;
 
-       if (!priv->profile->rx_ptp_support)
+       if (!mlx5e_profile_feature_cap(priv->profile, PTP_RX))
                return 0;
 
        ptp_fs = kzalloc(sizeof(*ptp_fs), GFP_KERNEL);
@@ -783,7 +783,7 @@ void mlx5e_ptp_free_rx_fs(struct mlx5e_priv *priv)
 {
        struct mlx5e_ptp_fs *ptp_fs = priv->fs.ptp_fs;
 
-       if (!priv->profile->rx_ptp_support)
+       if (!mlx5e_profile_feature_cap(priv->profile, PTP_RX))
                return;
 
        mlx5e_ptp_rx_unset_fs(priv);
@@ -794,7 +794,7 @@ int mlx5e_ptp_rx_manage_fs(struct mlx5e_priv *priv, bool set)
 {
        struct mlx5e_ptp *c = priv->channels.ptp;
 
-       if (!priv->profile->rx_ptp_support)
+       if (!mlx5e_profile_feature_cap(priv->profile, PTP_RX))
                return 0;
 
        if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
index c8757c5a812bcb1f900f880c56fc2c571e6afb0b..536fcb2c5e904bea53df0d1c38ba817311aa79f5 100644 (file)
@@ -1934,7 +1934,7 @@ int mlx5e_modify_rx_cqe_compression_locked(struct mlx5e_priv *priv, bool new_val
        if (curr_val == new_val)
                return 0;
 
-       if (new_val && !priv->profile->rx_ptp_support && rx_filter) {
+       if (new_val && !mlx5e_profile_feature_cap(priv->profile, PTP_RX) && rx_filter) {
                netdev_err(priv->netdev,
                           "Profile doesn't support enabling of CQE compression while hardware time-stamping is enabled.\n");
                return -EINVAL;
index 496977e7406e2319c3f1c8b0bcfd8a245f25de0d..6ca2240d7dffa9e50d8eb2dc080118fdfeb82510 100644 (file)
@@ -4038,7 +4038,7 @@ int mlx5e_hwstamp_set(struct mlx5e_priv *priv, struct ifreq *ifr)
                goto err_unlock;
        }
 
-       if (!priv->profile->rx_ptp_support)
+       if (!mlx5e_profile_feature_cap(priv->profile, PTP_RX))
                err = mlx5e_hwstamp_config_no_ptp_rx(priv,
                                                     config.rx_filter != HWTSTAMP_FILTER_NONE);
        else
@@ -5093,7 +5093,7 @@ static const struct mlx5e_profile mlx5e_nic_profile = {
        .rq_groups         = MLX5E_NUM_RQ_GROUPS(XSK),
        .stats_grps        = mlx5e_nic_stats_grps,
        .stats_grps_num    = mlx5e_nic_stats_grps_num,
-       .rx_ptp_support    = true,
+       .features          = BIT(MLX5E_PROFILE_FEATURE_PTP_RX),
 };
 
 static unsigned int
index 6e0f88ea3701ca6fab0cbe374fc73061be009aef..17d27d45a69d62ab13d9fb45b03ac26924f4414c 100644 (file)
@@ -1113,7 +1113,6 @@ static const struct mlx5e_profile mlx5e_rep_profile = {
        .rq_groups              = MLX5E_NUM_RQ_GROUPS(REGULAR),
        .stats_grps             = mlx5e_rep_stats_grps,
        .stats_grps_num         = mlx5e_rep_stats_grps_num,
-       .rx_ptp_support         = false,
 };
 
 static const struct mlx5e_profile mlx5e_uplink_rep_profile = {
@@ -1134,7 +1133,6 @@ static const struct mlx5e_profile mlx5e_uplink_rep_profile = {
        .rq_groups              = MLX5E_NUM_RQ_GROUPS(XSK),
        .stats_grps             = mlx5e_ul_rep_stats_grps,
        .stats_grps_num         = mlx5e_ul_rep_stats_grps_num,
-       .rx_ptp_support         = false,
 };
 
 /* e-Switch vport representors */
index 051b20ec7bdbeb7aca1dbcccfb309b13666f50fe..1b082576a63adc5b45224dd500e5ef813b187736 100644 (file)
@@ -449,7 +449,6 @@ static const struct mlx5e_profile mlx5i_nic_profile = {
        .rq_groups         = MLX5E_NUM_RQ_GROUPS(REGULAR),
        .stats_grps        = mlx5i_stats_grps,
        .stats_grps_num    = mlx5i_stats_grps_num,
-       .rx_ptp_support    = false,
 };
 
 /* mlx5i netdev NDos */
index 5308f23702bca6e47ac5679222db02a9959c8b7c..0b86e78dbc0e211952e16655bfc4a1db0122392b 100644 (file)
@@ -350,7 +350,6 @@ static const struct mlx5e_profile mlx5i_pkey_nic_profile = {
        .rx_handlers       = &mlx5i_rx_handlers,
        .max_tc            = MLX5I_MAX_NUM_TC,
        .rq_groups         = MLX5E_NUM_RQ_GROUPS(REGULAR),
-       .rx_ptp_support    = false,
 };
 
 const struct mlx5e_profile *mlx5i_pkey_get_profile(void)