int smu_v11_0_set_xgmi_pstate(struct smu_context *smu,
                                     uint32_t pstate)
 {
-       int ret = 0;
-       ret = smu_cmn_send_smc_msg_with_param(smu,
-                                         SMU_MSG_SetXgmiMode,
-                                         pstate ? XGMI_MODE_PSTATE_D0 : XGMI_MODE_PSTATE_D3,
+       return smu_cmn_send_smc_msg_with_param(smu,
+                                              SMU_MSG_SetXgmiMode,
+                                              pstate ? XGMI_MODE_PSTATE_D0 : XGMI_MODE_PSTATE_D3,
                                          NULL);
-       return ret;
 }
 
 static int smu_v11_0_set_irq_state(struct amdgpu_device *adev,
 
 int smu_v11_0_set_azalia_d3_pme(struct smu_context *smu)
 {
-       int ret = 0;
-
-       ret = smu_cmn_send_smc_msg(smu, SMU_MSG_BacoAudioD3PME, NULL);
-
-       return ret;
+       return smu_cmn_send_smc_msg(smu, SMU_MSG_BacoAudioD3PME, NULL);
 }
 
 static int smu_v11_0_baco_set_armd3_sequence(struct smu_context *smu, enum smu_v11_0_baco_seq baco_seq)
 
 int smu_v11_0_baco_exit(struct smu_context *smu)
 {
-       int ret = 0;
-
-       ret = smu_v11_0_baco_set_state(smu, SMU_BACO_STATE_EXIT);
-       if (ret)
-               return ret;
-
-       return ret;
+       return smu_v11_0_baco_set_state(smu, SMU_BACO_STATE_EXIT);
 }
 
 int smu_v11_0_mode1_reset(struct smu_context *smu)