arm64: dts: qcom: Fix hs_phy_irq for non-QUSB2 targets

On non-QUSB2 targets (like the ones that use femto phys, M31 phy, eusb2
phy), many of the QCOM DTs are missing the IRQ for either hs_phy_irq or
pwr_event. In one case, the hs_phy_irq was incorrectly defined with the
latter's IRQ number. Since the DT must describe the hw whether or not
the driver uses these interrupts, fix and add the missing entries in order
to describe the HW completely and accurately.

Also modify order of interrupts in accordance to bindings update.

Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Link: https://lore.kernel.org/r/20240125185921.5062-3-quic_kriskura@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi
index 2045fc779f887030735f9310982bdef228f8a481..ea67681b22e24d165ce8a9c50514cf80f9612639 100644 (file)
--- a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi
@@ -580,12 +580,16 @@
                                          <&gcc GCC_USB30_MASTER_CLK>;
                        assigned-clock-rates = <19200000>, <200000000>;
 
-                       interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
-                                             <&pdc 51 IRQ_TYPE_LEVEL_HIGH>,
+                       interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&pdc 10 IRQ_TYPE_EDGE_BOTH>,
                                              <&pdc 11 IRQ_TYPE_EDGE_BOTH>,
-                                             <&pdc 10 IRQ_TYPE_EDGE_BOTH>;
-                       interrupt-names = "hs_phy_irq", "ss_phy_irq",
-                                         "dm_hs_phy_irq", "dp_hs_phy_irq";
+                                             <&pdc 51 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "pwr_event",
+                                         "hs_phy_irq",
+                                         "dp_hs_phy_irq",
+                                         "dm_hs_phy_irq",
+                                         "ss_phy_irq";
 
                        power-domains = <&gcc USB30_GDSC>;
 

diff --git a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
index 40591a4da6a42fb7d0c0695e0e70c212a2b64c09..2b8635f0e38d9b0f253eec50189997610ccc84b0 100644 (file)
--- a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
@@ -501,14 +501,16 @@
                                          <&gcc GCC_USB30_MASTER_CLK>;
                        assigned-clock-rates = <19200000>, <200000000>;
 
-                       interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
-                                             <&pdc 76 IRQ_TYPE_LEVEL_HIGH>,
+                       interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&pdc 19 IRQ_TYPE_EDGE_BOTH>,
                                              <&pdc 18 IRQ_TYPE_EDGE_BOTH>,
-                                             <&pdc 19 IRQ_TYPE_EDGE_BOTH>;
-                       interrupt-names = "hs_phy_irq",
-                                         "ss_phy_irq",
+                                             <&pdc 76 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "pwr_event",
+                                         "hs_phy_irq",
+                                         "dp_hs_phy_irq",
                                          "dm_hs_phy_irq",
-                                         "dp_hs_phy_irq";
+                                         "ss_phy_irq";
 
                        power-domains = <&gcc USB30_GDSC>;
 

diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index a7eaca33d326441d64df943bc72258b6d2d29707..822467b3816fbc0c14f6789a2686a5c4b26a8ff4 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -1615,10 +1615,12 @@
                        assigned-clock-rates = <19200000>, <200000000>;
 
                        interrupts-extended = <&intc GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&intc GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
                                              <&pdc 14 IRQ_TYPE_EDGE_BOTH>,
                                              <&pdc 15 IRQ_TYPE_EDGE_BOTH>,
                                              <&pdc 12 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "pwr_event",
+                                         "hs_phy_irq",
                                          "dp_hs_phy_irq",
                                          "dm_hs_phy_irq",
                                          "ss_phy_irq";
@@ -1702,10 +1704,12 @@
                        assigned-clock-rates = <19200000>, <200000000>;
 
                        interrupts-extended = <&intc GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&intc GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
                                              <&pdc 8 IRQ_TYPE_EDGE_BOTH>,
                                              <&pdc 7 IRQ_TYPE_EDGE_BOTH>,
                                              <&pdc 13 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "pwr_event",
+                                         "hs_phy_irq",
                                          "dp_hs_phy_irq",
                                          "dm_hs_phy_irq",
                                          "ss_phy_irq";
@@ -1765,9 +1769,11 @@
                        assigned-clock-rates = <19200000>, <200000000>;
 
                        interrupts-extended = <&intc GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&intc GIC_SPI 443 IRQ_TYPE_LEVEL_HIGH>,
                                              <&pdc 10 IRQ_TYPE_EDGE_BOTH>,
                                              <&pdc 9 IRQ_TYPE_EDGE_BOTH>;
                        interrupt-names = "pwr_event",
+                                         "hs_phy_irq",
                                          "dp_hs_phy_irq",
                                          "dm_hs_phy_irq";
 

diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 4dcaa15caef263d9917ca62b01c1b0b82bf547ab..1fffd5fc7812ea5f45237c26657d3eb5c5958351 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -2964,12 +2964,16 @@
                                          <&gcc GCC_USB30_PRIM_MASTER_CLK>;
                        assigned-clock-rates = <19200000>, <150000000>;
 
-                       interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
-                                             <&pdc 6 IRQ_TYPE_LEVEL_HIGH>,
+                       interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&pdc 9 IRQ_TYPE_EDGE_BOTH>,
                                              <&pdc 8 IRQ_TYPE_EDGE_BOTH>,
-                                             <&pdc 9 IRQ_TYPE_EDGE_BOTH>;
-                       interrupt-names = "hs_phy_irq", "ss_phy_irq",
-                                         "dm_hs_phy_irq", "dp_hs_phy_irq";
+                                             <&pdc 6 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "pwr_event",
+                                         "hs_phy_irq",
+                                         "dp_hs_phy_irq",
+                                         "dm_hs_phy_irq",
+                                         "ss_phy_irq";
 
                        power-domains = <&gcc USB30_PRIM_GDSC>;
                        required-opps = <&rpmhpd_opp_nom>;

diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index a95e8eb62a11baeeb85bfbf9c58a3743c7b73b49..89fc271b70865c0ed13c992055823a2f96e0e0c1 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -3590,10 +3590,12 @@
                                          <&gcc GCC_USB30_SEC_MASTER_CLK>;
                        assigned-clock-rates = <19200000>, <200000000>;
 
-                       interrupts-extended = <&intc GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>,
+                       interrupts-extended = <&intc GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&intc GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>,
                                              <&pdc 12 IRQ_TYPE_EDGE_BOTH>,
                                              <&pdc 13 IRQ_TYPE_EDGE_BOTH>;
-                       interrupt-names = "hs_phy_irq",
+                       interrupt-names = "pwr_event",
+                                         "hs_phy_irq",
                                          "dp_hs_phy_irq",
                                          "dm_hs_phy_irq";
 
@@ -4043,11 +4045,13 @@
                                          <&gcc GCC_USB30_PRIM_MASTER_CLK>;
                        assigned-clock-rates = <19200000>, <200000000>;
 
-                       interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+                       interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
                                              <&pdc 14 IRQ_TYPE_EDGE_BOTH>,
                                              <&pdc 15 IRQ_TYPE_EDGE_BOTH>,
                                              <&pdc 17 IRQ_TYPE_LEVEL_HIGH>;
-                       interrupt-names = "hs_phy_irq",
+                       interrupt-names = "pwr_event",
+                                         "hs_phy_irq",
                                          "dp_hs_phy_irq",
                                          "dm_hs_phy_irq",
                                          "ss_phy_irq";

diff --git a/arch/arm64/boot/dts/qcom/sm6375.dtsi b/arch/arm64/boot/dts/qcom/sm6375.dtsi
index 7ac8bf26dda3a28c40ce996705fb42c0ddf545f2..4386f8a9c636c1dd58a21ed8002d385c3d716c5c 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm6375.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6375.dtsi
@@ -1431,13 +1431,15 @@
                        assigned-clock-rates = <19200000>, <133333333>;
 
                        interrupts-extended = <&intc GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>,
-                                             <&mpm 12 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&intc GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&mpm 94 IRQ_TYPE_EDGE_BOTH>,
                                              <&mpm 93 IRQ_TYPE_EDGE_BOTH>,
-                                             <&mpm 94 IRQ_TYPE_EDGE_BOTH>;
-                       interrupt-names = "hs_phy_irq",
-                                         "ss_phy_irq",
+                                             <&mpm 12 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "pwr_event",
+                                         "hs_phy_irq",
+                                         "dp_hs_phy_irq",
                                          "dm_hs_phy_irq",
-                                         "dp_hs_phy_irq";
+                                         "ss_phy_irq";
 
                        power-domains = <&gcc USB30_PRIM_GDSC>;
 

diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 761a6757dc26f082d0488661d8035f4f3e51a18e..6beb2e2143bb3d3acd1bc2966a9ce87031cc0708 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -3573,12 +3573,16 @@
                                          <&gcc GCC_USB30_PRIM_MASTER_CLK>;
                        assigned-clock-rates = <19200000>, <200000000>;
 
-                       interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
-                                             <&pdc 6 IRQ_TYPE_LEVEL_HIGH>,
+                       interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&pdc 9 IRQ_TYPE_EDGE_BOTH>,
                                              <&pdc 8 IRQ_TYPE_EDGE_BOTH>,
-                                             <&pdc 9 IRQ_TYPE_EDGE_BOTH>;
-                       interrupt-names = "hs_phy_irq", "ss_phy_irq",
-                                         "dm_hs_phy_irq", "dp_hs_phy_irq";
+                                             <&pdc 6 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "pwr_event",
+                                         "hs_phy_irq",
+                                         "dp_hs_phy_irq",
+                                         "dm_hs_phy_irq",
+                                         "ss_phy_irq";
 
                        power-domains = <&gcc USB30_PRIM_GDSC>;
 
@@ -3645,12 +3649,16 @@
                                          <&gcc GCC_USB30_SEC_MASTER_CLK>;
                        assigned-clock-rates = <19200000>, <200000000>;
 
-                       interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
-                                             <&pdc 7 IRQ_TYPE_LEVEL_HIGH>,
+                       interrupts-extended = <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&pdc 11 IRQ_TYPE_EDGE_BOTH>,
                                              <&pdc 10 IRQ_TYPE_EDGE_BOTH>,
-                                             <&pdc 11 IRQ_TYPE_EDGE_BOTH>;
-                       interrupt-names = "hs_phy_irq", "ss_phy_irq",
-                                         "dm_hs_phy_irq", "dp_hs_phy_irq";
+                                             <&pdc 7 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "pwr_event",
+                                         "hs_phy_irq",
+                                         "dp_hs_phy_irq",
+                                         "dm_hs_phy_irq",
+                                         "ss_phy_irq";
 
                        power-domains = <&gcc USB30_SEC_GDSC>;
 

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 760501c1301a6216fc22c48b388c4e69aa966a18..eaaf13b7b15b8e6a08b8fa528e5e2c23dc9f5c5d 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -4128,14 +4128,16 @@
                                          <&gcc GCC_USB30_PRIM_MASTER_CLK>;
                        assigned-clock-rates = <19200000>, <200000000>;
 
-                       interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
-                                             <&pdc 17 IRQ_TYPE_LEVEL_HIGH>,
+                       interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&pdc 14 IRQ_TYPE_EDGE_BOTH>,
                                              <&pdc 15 IRQ_TYPE_EDGE_BOTH>,
-                                             <&pdc 14 IRQ_TYPE_EDGE_BOTH>;
-                       interrupt-names = "hs_phy_irq",
-                                         "ss_phy_irq",
+                                             <&pdc 17 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "pwr_event",
+                                         "hs_phy_irq",
+                                         "dp_hs_phy_irq",
                                          "dm_hs_phy_irq",
-                                         "dp_hs_phy_irq";
+                                         "ss_phy_irq";
 
                        power-domains = <&gcc USB30_PRIM_GDSC>;
                        wakeup-source;
@@ -4197,14 +4199,16 @@
                                          <&gcc GCC_USB30_SEC_MASTER_CLK>;
                        assigned-clock-rates = <19200000>, <200000000>;
 
-                       interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
-                                             <&pdc 16 IRQ_TYPE_LEVEL_HIGH>,
+                       interrupts-extended = <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&pdc 12 IRQ_TYPE_EDGE_BOTH>,
                                              <&pdc 13 IRQ_TYPE_EDGE_BOTH>,
-                                             <&pdc 12 IRQ_TYPE_EDGE_BOTH>;
-                       interrupt-names = "hs_phy_irq",
-                                         "ss_phy_irq",
+                                             <&pdc 16 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "pwr_event",
+                                         "hs_phy_irq",
+                                         "dp_hs_phy_irq",
                                          "dm_hs_phy_irq",
-                                         "dp_hs_phy_irq";
+                                         "ss_phy_irq";
 
                        power-domains = <&gcc USB30_SEC_GDSC>;
                        wakeup-source;

diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index e78c83a897c283e855dac3183faeab48d798cc43..26bf2c2c66aeb795344df8c6e684af585f786393 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -2312,14 +2312,16 @@
                                          <&gcc GCC_USB30_PRIM_MASTER_CLK>;
                        assigned-clock-rates = <19200000>, <200000000>;
 
-                       interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
-                                             <&pdc 17 IRQ_TYPE_LEVEL_HIGH>,
+                       interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&pdc 14 IRQ_TYPE_EDGE_BOTH>,
                                              <&pdc 15 IRQ_TYPE_EDGE_BOTH>,
-                                             <&pdc 14 IRQ_TYPE_EDGE_BOTH>;
-                       interrupt-names = "hs_phy_irq",
-                                         "ss_phy_irq",
+                                             <&pdc 17 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "pwr_event",
+                                         "hs_phy_irq",
+                                         "dp_hs_phy_irq",
                                          "dm_hs_phy_irq",
-                                         "dp_hs_phy_irq";
+                                         "ss_phy_irq";
 
                        power-domains = <&gcc USB30_PRIM_GDSC>;
 
@@ -2385,14 +2387,16 @@
                                          <&gcc GCC_USB30_SEC_MASTER_CLK>;
                        assigned-clock-rates = <19200000>, <200000000>;
 
-                       interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
-                                             <&pdc 16 IRQ_TYPE_LEVEL_HIGH>,
+                       interrupts-extended = <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&pdc 12 IRQ_TYPE_EDGE_BOTH>,
                                              <&pdc 13 IRQ_TYPE_EDGE_BOTH>,
-                                             <&pdc 12 IRQ_TYPE_EDGE_BOTH>;
-                       interrupt-names = "hs_phy_irq",
-                                         "ss_phy_irq",
+                                             <&pdc 16 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "pwr_event",
+                                         "hs_phy_irq",
+                                         "dp_hs_phy_irq",
                                          "dm_hs_phy_irq",
-                                         "dp_hs_phy_irq";
+                                         "ss_phy_irq";
 
                        power-domains = <&gcc USB30_SEC_GDSC>;
 

diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 01e4dfc4babd2904eee95b3eaf4d63516d6c019a..ec5c02171af678d234fbd4092551a535af27898e 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -4485,13 +4485,15 @@
                        assigned-clock-rates = <19200000>, <200000000>;
 
                        interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
-                                             <&pdc 17 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&pdc 14 IRQ_TYPE_EDGE_BOTH>,
                                              <&pdc 15 IRQ_TYPE_EDGE_BOTH>,
-                                             <&pdc 14 IRQ_TYPE_EDGE_BOTH>;
-                       interrupt-names = "hs_phy_irq",
-                                         "ss_phy_irq",
+                                             <&pdc 17 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "pwr_event",
+                                         "hs_phy_irq",
+                                         "dp_hs_phy_irq",
                                          "dm_hs_phy_irq",
-                                         "dp_hs_phy_irq";
+                                         "ss_phy_irq";
 
                        power-domains = <&gcc USB30_PRIM_GDSC>;
 

diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index ee1ba5a8c8fc2fc25345f5b356b9f9f410f70b6a..671018a1a3c725133b19df3e88c5f79817bf61da 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -3133,13 +3133,15 @@
                        assigned-clock-rates = <19200000>, <200000000>;
 
                        interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
-                                             <&pdc 17 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&pdc 14 IRQ_TYPE_EDGE_BOTH>,
                                              <&pdc 15 IRQ_TYPE_EDGE_BOTH>,
-                                             <&pdc 14 IRQ_TYPE_EDGE_BOTH>;
-                       interrupt-names = "hs_phy_irq",
-                                         "ss_phy_irq",
+                                             <&pdc 17 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "pwr_event",
+                                         "hs_phy_irq",
+                                         "dp_hs_phy_irq",
                                          "dm_hs_phy_irq",
-                                         "dp_hs_phy_irq";
+                                         "ss_phy_irq";
 
                        power-domains = <&gcc USB30_PRIM_GDSC>;
                        required-opps = <&rpmhpd_opp_nom>;