wifi: rtw89: phy: set channel_info for WiFi 7 chips

The channel_info is hardware settings to reflect operational status, such
as scale factor, report unit, buffer matrix size, RU size and so on. Then,
we can get desired reports to do further tuning.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://msgid.link/20240105064440.36926-1-pkshih@realtek.com

diff --git a/drivers/net/wireless/realtek/rtw89/phy.c b/drivers/net/wireless/realtek/rtw89/phy.c
index 69debc156edbb921884bb6ea2a602c3b03e197d7..926a4459ea4fb56c9fae23a32f9432a1f1bcbd3a 100644 (file)
--- a/drivers/net/wireless/realtek/rtw89/phy.c
+++ b/drivers/net/wireless/realtek/rtw89/phy.c
@@ -4968,6 +4968,7 @@ void rtw89_phy_dm_init(struct rtw89_dev *rtwdev)
        rtw89_phy_cfo_init(rtwdev);
        rtw89_phy_bb_wrap_init(rtwdev);
        rtw89_phy_edcca_init(rtwdev);
+       rtw89_phy_ch_info_init(rtwdev);
        rtw89_phy_ul_tb_info_init(rtwdev);
        rtw89_phy_antdiv_init(rtwdev);
        rtw89_chip_rfe_gpio(rtwdev);
@@ -5493,6 +5494,7 @@ const struct rtw89_phy_gen_def rtw89_phy_gen_ax = {
        .config_bb_gain = rtw89_phy_config_bb_gain_ax,
        .preinit_rf_nctl = rtw89_phy_preinit_rf_nctl_ax,
        .bb_wrap_init = NULL,
+       .ch_info_init = NULL,
 
        .set_txpwr_byrate = rtw89_phy_set_txpwr_byrate_ax,
        .set_txpwr_offset = rtw89_phy_set_txpwr_offset_ax,

diff --git a/drivers/net/wireless/realtek/rtw89/phy.h b/drivers/net/wireless/realtek/rtw89/phy.h
index 2ffd33b078b280c2ca60a886ed7d38bbb2421e15..a16bff77661f0a0669fe14901ba9d9913a82101a 100644 (file)
--- a/drivers/net/wireless/realtek/rtw89/phy.h
+++ b/drivers/net/wireless/realtek/rtw89/phy.h
@@ -515,6 +515,7 @@ struct rtw89_phy_gen_def {
                               void *extra_data);
        void (*preinit_rf_nctl)(struct rtw89_dev *rtwdev);
        void (*bb_wrap_init)(struct rtw89_dev *rtwdev);
+       void (*ch_info_init)(struct rtw89_dev *rtwdev);
 
        void (*set_txpwr_byrate)(struct rtw89_dev *rtwdev,
                                 const struct rtw89_chan *chan,
@@ -812,6 +813,14 @@ static inline void rtw89_phy_bb_wrap_init(struct rtw89_dev *rtwdev)
                phy->bb_wrap_init(rtwdev);
 }
 
+static inline void rtw89_phy_ch_info_init(struct rtw89_dev *rtwdev)
+{
+       const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def;
+
+       if (phy->ch_info_init)
+               phy->ch_info_init(rtwdev);
+}
+
 static inline
 void rtw89_phy_set_txpwr_byrate(struct rtw89_dev *rtwdev,
                                const struct rtw89_chan *chan,

diff --git a/drivers/net/wireless/realtek/rtw89/phy_be.c b/drivers/net/wireless/realtek/rtw89/phy_be.c
index e8ce29de1c52addb4d7e212e151ca7bb94911e3a..6849438a5f3cc7426d59ae3898b7535d092ad845 100644 (file)
--- a/drivers/net/wireless/realtek/rtw89/phy_be.c
+++ b/drivers/net/wireless/realtek/rtw89/phy_be.c
@@ -375,6 +375,17 @@ static void rtw89_phy_bb_wrap_init_be(struct rtw89_dev *rtwdev)
        rtw89_phy_bb_wrap_tpu_set_all(rtwdev, mac_idx);
 }
 
+static void rtw89_phy_ch_info_init_be(struct rtw89_dev *rtwdev)
+{
+       rtw89_phy_write32_mask(rtwdev, R_CHINFO_SEG, B_CHINFO_SEG_LEN, 0x0);
+       rtw89_phy_write32_mask(rtwdev, R_CHINFO_SEG, B_CHINFO_SEG, 0xf);
+       rtw89_phy_write32_mask(rtwdev, R_CHINFO_DATA, B_CHINFO_DATA_BITMAP, 0x1);
+       rtw89_phy_set_phy_regs(rtwdev, R_CHINFO_ELM_SRC, B_CHINFO_ELM_BITMAP, 0x40303);
+       rtw89_phy_set_phy_regs(rtwdev, R_CHINFO_ELM_SRC, B_CHINFO_SRC, 0x0);
+       rtw89_phy_set_phy_regs(rtwdev, R_CHINFO_TYPE_SCAL, B_CHINFO_TYPE, 0x3);
+       rtw89_phy_set_phy_regs(rtwdev, R_CHINFO_TYPE_SCAL, B_CHINFO_SCAL, 0x0);
+}
+
 struct rtw89_byr_spec_ent_be {
        struct rtw89_rate_desc init;
        u8 num_of_idx;
@@ -944,6 +955,7 @@ const struct rtw89_phy_gen_def rtw89_phy_gen_be = {
        .config_bb_gain = rtw89_phy_config_bb_gain_be,
        .preinit_rf_nctl = rtw89_phy_preinit_rf_nctl_be,
        .bb_wrap_init = rtw89_phy_bb_wrap_init_be,
+       .ch_info_init = rtw89_phy_ch_info_init_be,
 
        .set_txpwr_byrate = rtw89_phy_set_txpwr_byrate_be,
        .set_txpwr_offset = rtw89_phy_set_txpwr_offset_be,

diff --git a/drivers/net/wireless/realtek/rtw89/reg.h b/drivers/net/wireless/realtek/rtw89/reg.h
index a03fb3784d1c327e35d58a6c5f9e5de971cba2b0..b411bf726849bc05e48dcac2069a6179b69b7da2 100644 (file)
--- a/drivers/net/wireless/realtek/rtw89/reg.h
+++ b/drivers/net/wireless/realtek/rtw89/reg.h
@@ -7512,9 +7512,14 @@
 #define B_UPD_P0_EN BIT(31)
 #define R_SPOOF_CG 0x00B4
 #define B_SPOOF_CG_EN BIT(17)
+#define R_CHINFO_SEG 0x00B4
+#define B_CHINFO_SEG_LEN GENMASK(2, 0)
+#define B_CHINFO_SEG GENMASK(16, 7)
 #define R_DFS_FFT_CG 0x00B8
 #define B_DFS_CG_EN BIT(1)
 #define B_DFS_FFT_EN BIT(0)
+#define R_CHINFO_DATA 0x00C0
+#define B_CHINFO_DATA_BITMAP GENMASK(22, 0)
 #define R_ANAPAR_PW15 0x030C
 #define B_ANAPAR_PW15 GENMASK(31, 24)
 #define B_ANAPAR_PW15_H GENMASK(27, 24)
@@ -8154,6 +8159,12 @@
 #define B_PATH1_5MDET_SB2 BIT(8)
 #define B_PATH1_5MDET_SB0 BIT(6)
 #define B_PATH1_5MDET_TH GENMASK(5, 0)
+#define R_CHINFO_ELM_SRC 0x4D84
+#define B_CHINFO_ELM_BITMAP GENMASK(22, 0)
+#define B_CHINFO_SRC GENMASK(31, 30)
+#define R_CHINFO_TYPE_SCAL 0x4D88
+#define B_CHINFO_TYPE GENMASK(2, 1)
+#define B_CHINFO_SCAL BIT(8)
 #define R_RPL_BIAS_COMP 0x4DF0
 #define B_RPL_BIAS_COMP_MASK GENMASK(7, 0)
 #define R_RPL_PATHAB 0x4E0C