drm/amdgpu/mes10.1: copy mes fw info into global fw array

Copy mes firmware info into into global fw array, preparing
for fw front door loading.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c b/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c
index a6a96cf96b22e1150eea003465006d90e6f0c07c..a0fd3c3c739799139dde5b78bf64fc228541b3b4 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c
@@ -271,6 +271,7 @@ static int mes_v10_1_init_microcode(struct amdgpu_device *adev)
        char fw_name[30];
        int err;
        const struct mes_firmware_header_v1_0 *mes_hdr;
+       struct amdgpu_firmware_info *info;
 
        switch (adev->asic_type) {
        case CHIP_NAVI10:
@@ -306,6 +307,22 @@ static int mes_v10_1_init_microcode(struct amdgpu_device *adev)
                le32_to_cpu(mes_hdr->mes_data_start_addr_lo) |
                ((uint64_t)(le32_to_cpu(mes_hdr->mes_data_start_addr_hi)) << 32);
 
+       if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {
+               info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_MES];
+               info->ucode_id = AMDGPU_UCODE_ID_CP_MES;
+               info->fw = adev->mes.fw;
+               adev->firmware.fw_size +=
+                       ALIGN(le32_to_cpu(mes_hdr->mes_ucode_size_bytes),
+                             PAGE_SIZE);
+
+               info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_MES_DATA];
+               info->ucode_id = AMDGPU_UCODE_ID_CP_MES_DATA;
+               info->fw = adev->mes.fw;
+               adev->firmware.fw_size +=
+                       ALIGN(le32_to_cpu(mes_hdr->mes_ucode_data_size_bytes),
+                             PAGE_SIZE);
+       }
+
        return 0;
 }